PIC32MX120F064H-I/MR - 32-bit 50MHz 64KB Flash MCU | Microchip
Teilenummer: PIC32MX120F064H-I/MR ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $4.65 | $4,65 |
| 10 | $4.19 | $41,90 |
| 100 | $3.74 | $374,00 |
| 500 | $3.3 | $1.650,00 |
| 1.000 | $2.85 | $2.850,00 |
PIC32MX120F064H-I/MR Übersicht
What is a PIC32MX microcontroller? PIC32MX is Microchip's line of 32-bit MIPS-based microcontrollers, sitting in the product hierarchy: microcontroller -> 32-bit MCU -> MIPS32 M4K core -> embedded controller. PIC32MX parts combine the performance of the MIPS32 M4K core with Microchip's peripheral ecosystem (PPS, PMP, CTMU) to enable rich human-machine-interface (HMI) designs that 8-bit and 16-bit MCUs cannot deliver. The PIC32MX120F064H variant is the entry-point Flash/RAM density of the family and is positioned for cost-sensitive HMI and connectivity nodes.
Key features of the PIC32MX120F064H-I/MR include two I2S modules and four SPI interfaces for codec and serial communications, Peripheral Pin Select (PPS) for flexible pin-function remapping, a Parallel Master Port (PMP) with dual read/write buffers for graphics, an integrated Charge Time Measurement Unit (CTMU) for capacitive touch and precision time measurement, plus 5-bit parallel master port support. The 64-QFN package integrates a thermal pad that lowers theta-JA for continuous HMI workloads.
Architecturally, the device combines a single-cycle MIPS32 M4K core with hardware multiply/divide, a multi-vectored interrupt controller, and 5-stage pipeline. Peripherals are clock-gated; PPS allows remapping of digital functions onto most I/O pins, simplifying PCB routing on HMI boards where multiple SPI/I2S instances must coexist with PMP and CTMU I/O.
Typical applications include audio player front-ends, low-cost graphics HMI with PMP-driven TFT/LCD, capacitive-touch keypads via CTMU, USB device-class peripherals, CAN-connected industrial sensor nodes, and serial-bridge designs (UART/SPI/I2C) that upgrade legacy 16-bit PIC24 designs without changing the toolchain. Operating voltage is 2.3 V to 3.6 V, suiting 3.3 V system rails.
When designing with this part, place a 0.1 uF decoupling capacitor on every VDD/AVDD pin pair and tie the exposed pad (EP) to a continuous ground plane to meet the package's thermal/return-path spec. PPS configuration must be done before peripheral enable or the pins will revert to defaults, which is a common pitfall when porting code from fixed-pin PIC24 designs.
This page synthesizes distributor pricing, parametric cross-references, and practical PPS/CTMU design notes not collected in any single manufacturer datasheet, giving engineers a faster path from concept to prototype.
Drop-in-Alternativen für PIC32MX120F064H-I/MR – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit PIC32MX120F064H-I/MR (gleiche Bauform und Footprint) – abweichend in Package, ADC, Maximum CPU Speed, Parallel Master Port (PMP), Core Size.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
PIC32MX120F064HT-I/MR
✅ Drop-In✓ Auf Lager
$2.45 / Stück
Datenblatt ansehen →PIC32MX120F064H-V/MR
✅ Drop-In✓ Auf Lager
$2.18 / Stück
Datenblatt ansehen →PIC32MX120F064HT-V/MR
✅ Drop-In✓ Auf Lager
$2.18 / Stück
Datenblatt ansehen →PIC32MX120F064H-50I/MR
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PIC32MX170F256B-I/MR
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PIC32MX120F064H-I/MR Grenzwerte & elektrische Eigenschaften
| Core | MIPS32 M4K |
| Core Size | 32-bit |
| Maximum CPU Speed | 50 MHz (83 DMIPS) |
| Program Memory (Flash) | 64 KB (64K x 8) |
| Data Memory (SRAM) | 8 KB |
| Gehäuse | 64-QFN (MR) 9x9 mm with exposed pad |
| Operating Voltage | 2.3 V to 3.6 V |
| Betriebstemperaturbereich | -40C to +85C (Industrial) |
| I2S Modules | 2 |
| SPI Modules | 4 |
| Parallel Master Port (PMP) | Yes (with dual buffers) |
| Peripheral Pin Select (PPS) | Yes |
| CTMU (Charge Time Measurement Unit) | Yes |
| Montageart | Surface Mount |
| RoHS-Status | Compliant |
| Lead-Free | Yes |
PIC32MX120F064H-I/MR Pin-Konfiguration
| Pin 1 | RPB0 — PPS remappable I/O port B bit 0 |
| Pin 2 | RPB1 — PPS remappable I/O port B bit 1 |
| Pin 3 | RPB2 — PPS remappable I/O port B bit 2 |
| Pin 4 | RPB3 — PPS remappable I/O port B bit 3 |
| Pin 5 | VSS — Ground reference |
| Pin 6 | VDD — Positive supply voltage (2.3V-3.6V) |
| Pin 7 | RPB4 — PPS remappable I/O port B bit 4 |
| Pin 8 | RPB5 — PPS remappable I/O port B bit 5 |
| Pin 9 | RPB6 — PPS remappable I/O port B bit 6 |
| Pin 10 | RPB7 — PPS remappable I/O port B bit 7 |
| Pin 11 | VSS — Ground reference |
| Pin 12 | VDD — Positive supply voltage (2.3V-3.6V) |
| Pin 13 | RPC0 — PPS remappable I/O port C bit 0 |
| Pin 14 | RPC1 — PPS remappable I/O port C bit 1 |
| Pin 15 | RPC2 — PPS remappable I/O port C bit 2 |
| Pin 16 | RPC3 — PPS remappable I/O port C bit 3 |
| Pin 17 | RPC4 — PPS remappable I/O port C bit 4 |
| Pin 18 | RPC5 — PPS remappable I/O port C bit 5 |
| Pin 19 | VSS — Ground reference |
| Pin 20 | VDD — Positive supply voltage (2.3V-3.6V) |
| Pin 21 | RPC6 — PPS remappable I/O port C bit 6 |
| Pin 22 | RPC7 — PPS remappable I/O port C bit 7 |
| Pin 23 | RPC8 — PPS remappable I/O port C bit 8 |
| Pin 24 | RPC9 — PPS remappable I/O port C bit 9 |
| Pin 25 | OSC1 — Primary oscillator input |
| Pin 26 | OSC2 — Primary oscillator output |
| Pin 27 | VSS — Ground reference |
| Pin 28 | VDD — Positive supply voltage (2.3V-3.6V) |
| Pin 29 | RPD0 — PPS remappable I/O port D bit 0 |
| Pin 30 | RPD1 — PPS remappable I/O port D bit 1 |
| Pin 31 | RPD2 — PPS remappable I/O port D bit 2 |
| Pin 32 | RPD3 — PPS remappable I/O port D bit 3 |
| Pin 33 | RPD4 — PPS remappable I/O port D bit 4 |
| Pin 34 | RPD5 — PPS remappable I/O port D bit 5 |
| Pin 35 | RPD6 — PPS remappable I/O port D bit 6 |
| Pin 36 | RPD7 — PPS remappable I/O port D bit 7 |
| Pin 37 | VSS — Ground reference |
| Pin 38 | VDD — Positive supply voltage (2.3V-3.6V) |
| Pin 39 | RPD8 — PPS remappable I/O port D bit 8 |
| Pin 40 | RPD9 — PPS remappable I/O port D bit 9 |
| Pin 41 | RPD10 — PPS remappable I/O port D bit 10 |
| Pin 42 | RPD11 — PPS remappable I/O port D bit 11 |
| Pin 43 | RPD12 — PPS remappable I/O port D bit 12 |
| Pin 44 | RPD13 — PPS remappable I/O port D bit 13 |
| Pin 45 | RPD14 — PPS remappable I/O port D bit 14 |
| Pin 46 | RPD15 — PPS remappable I/O port D bit 15 |
| Pin 47 | VSS — Ground reference |
| Pin 48 | VDD — Positive supply voltage (2.3V-3.6V) |
| Pin 49 | RPA0 — PPS remappable I/O port A bit 0 |
| Pin 50 | RPA1 — PPS remappable I/O port A bit 1 |
| Pin 51 | RPA2 — PPS remappable I/O port A bit 2 |
| Pin 52 | RPA3 — PPS remappable I/O port A bit 3 |
| Pin 53 | RPA4 — PPS remappable I/O port A bit 4 |
| Pin 54 | RPA5 — PPS remappable I/O port A bit 5 |
| Pin 55 | RPA6 — PPS remappable I/O port A bit 6 |
| Pin 56 | RPA7 — PPS remappable I/O port A bit 7 |
| Pin 57 | VSS — Ground reference |
| Pin 58 | VDD — Positive supply voltage (2.3V-3.6V) |
| Pin 59 | RPA8 — PPS remappable I/O port A bit 8 |
| Pin 60 | RPA9 — PPS remappable I/O port A bit 9 |
| Pin 61 | RPA10 — PPS remappable I/O port A bit 10 |
| Pin 62 | RPA11 — PPS remappable I/O port A bit 11 |
| Pin 63 | RPA12 — PPS remappable I/O port A bit 12 |
| Pin 64 | RPA13 — PPS remappable I/O port A bit 13 |
Typische Anwendungen
PIC32MX120F064H-I/MR ist geeignet für 6 Anwendungs: Audio Player Front-End with I2S Codec, Low-Cost Graphics HMI with PMP TFT, Capacitive Touch Keypad via CTMU, Industrial Sensor Node with CAN/CAN-FD, USB Device-Class Peripheral Bridge, Battery-Powered IoT Sensor Node.
Audio Player Front-End with I2S Codec
The PIC32MX120F064H-I/MR is well suited for audio front-ends because it integrates two I2S modules capable of driving external stereo DACs at 44.1 kHz and 48 kHz sample rates, while the 50 MHz MIPS32 M4K core runs PCM decode and UI state machines without offloading to a DSP. With 64 KB Flash it can hold small audio decoders (WAV/ADPCM) and UI assets, and the 64-QFN (MR) footprint fits behind a 2.4-inch TFT or character LCD. Place a low-jitter crystal on the primary oscillator pins and route the I2S data/clock lines impedance-matched to the codec to keep jitter under 50 ps RMS.
Empfohlen
Low-Cost Graphics HMI with PMP TFT
The PIC32MX120F064H-I/MR integrates a Parallel Master Port (PMP) with dual read/write buffers that drives 8-bit or 16-bit TFTs up to QVGA resolution at reasonable refresh rates. The 50 MHz core combined with DMA-fed PMP transfers keeps CPU headroom for touch scanning and UI logic. PPS allows sharing the data bus across PMP and SPI-controlled peripherals without remapping the PCB. Use the CTMU for resistive touch sensing on the same MCU, eliminating an external touch controller and reducing BOM cost on entry-level HMI panels.
Empfohlen
Capacitive Touch Keypad via CTMU
The Charge Time Measurement Unit (CTMU) on the PIC32MX120F064H-I/MR measures capacitance changes on up to 16 keys without external analog components, enabling fully integrated capacitive-touch keypads. The CTMU resolution supports reliable wake-on-touch with sub-microamp standby current. The 64-QFN (MR) 9x9 mm footprint fits behind a glass overlay on small appliances, IoT wall switches, and industrial keypads. Route the CTMU traces symmetrically and guard them with a ground ring to keep sensitivity uniform across all keys.
Empfohlen
Industrial Sensor Node with CAN/CAN-FD
The PIC32MX120F064H-I/MR serves as a sensor-conditioning node in industrial automation, where its 64 KB Flash and 50 MHz core run filtering and protocol conversion while PPS maps peripherals to convenient PCB positions. For designs requiring CAN bus connectivity, the PIC32MX5xx family is recommended; the PIC32MX120F064H itself is positioned for analog front-end plus serial-bridge roles. The 64-QFN with exposed pad improves thermal performance in enclosed industrial enclosures. Isolate RS-485 or UART lines with TVS diodes and use the internal CTMU for temperature-compensated sensor biasing.
Empfohlen
USB Device-Class Peripheral Bridge
Although the PIC32MX120F064H-I/MR variant lacks an integrated USB module, the same family PIC32MX2xx with USB OTG shares the PPS, PMP, and CTMU peripheral architecture and offers a familiar migration path. The PIC32MX120F064H-I/MR can serve as a UART/SPI/I2C to RS-485 bridge that talks upstream to a USB-equipped host MCU, splitting responsibilities across the bus. The 64-QFN footprint supports high-density designs where several bridge MCUs share a panel. Add 4k7 pull-ups on I2C and ESD arrays on external connector pins.
Empfohlen
Battery-Powered IoT Sensor Node
The PIC32MX120F064H-I/MR supports deep-sleep and idle modes with retention that bring quiescent current into the microamp range, suiting battery-powered IoT sensor nodes that wake on timer or external interrupt. With 64 KB Flash, on-board TLS handshake logic and small sensor stacks fit comfortably, while PPS allows routing wake-up sources to low-power pins. The PIC32MM family is recommended for ultra-low-power IoT, but the PIC32MX120F064H-I/MR offers higher MIPS for edge processing on wake-up. Use the CTMU to monitor battery voltage through a resistive divider without an external ADC channel.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für PIC32MX120F064H-I/MR – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | PIC32MX120F064HT-I/MR | PIC32MX120F064H-V/MR | PIC32MX120F064HT-V/MR | PIC32MX120F064H-50I/MR | PIC32MX170F256B-I/MR |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-QFN (MR) 9x9 mm | 64-QFN (MR) 9x9 mm - same | 64-QFN (MR) 9x9 mm - same | 64-QFN (MR) 9x9 mm - same | 64-QFN (MR) 9x9 mm - same | 64-QFN (MR) 9x9 mm - same |
| Flash | 64 KB | 64 KB - same | 64 KB - same | 64 KB - same | 64 KB - same | 256 KB (+300%) |
| SRAM | 8 KB | 8 KB - same | 8 KB - same | 8 KB - same | 8 KB - same | 32 KB (+300%) |
| Max CPU Speed | 50 MHz | 50 MHz - same | 50 MHz - same | 50 MHz - same | 50 MHz - same | 50 MHz - same |
| Temperature Grade | Industrial (-40C to +85C) | Industrial (-40C to +85C) | V-temp (-40C to +105C) | V-temp (-40C to +105C) | Industrial (-40C to +85C) | Industrial (-40C to +85C) |
| USB Module | No | No | No | No | No | No |
| PPS / CTMU / PMP | Yes / Yes / Yes | Yes / Yes / Yes - same | Yes / Yes / Yes - same | Yes / Yes / Yes - same | Yes / Yes / Yes - same | Yes / Yes / Yes - same |
| Approx. Unit Price (1k qty) | $2.85 | ~$2.85 (same die) | ~$3.10 | ~$3.10 | ~$3.20 | ~$4.10 |
Wichtigste Unterscheidungsmerkmale
- Entry-density 64-QFN part with full PIC32MX peripheral set (PPS, PMP, CTMU, 2x I2S) (vs. PIC32MX170F256B-I/MR)
- Drop-in temperature grade flexibility within the same QFN footprint (vs. PIC32MX120F064H-V/MR)
- Tape-and-reel option for SMT production without changing part number logic (vs. PIC32MX120F064HT-I/MR)
Designhinweise
Place a 0.1 uF decoupling capacitor within 3 mm of every VDD pin (pins 6, 12, 20, 28, 38, 48, 58) and a single 10 uF bulk capacitor near the package. The PIC32MX120F064H-I/MR can source significant inrush during oscillator startup, so the bulk capacitor must have low ESR (ceramic X7R or polymer tantalum). For AVDD pairs, add a ferrite bead or 10 ohm resistor in series to filter analog supply noise. Always populate the exposed thermal pad (EP) with at least eight thermal vias to the inner ground plane to meet the package's thermal spec.
Route the primary oscillator (OSC1/OSC2 at pins 25/26) traces symmetrically and guard them with a continuous ground ring to keep clock jitter under 50 ps. PPS assignment must be completed before peripheral enable - configuring PPS after enabling a peripheral leaves the pin at its default mapping, a common pitfall when porting code from fixed-pin PIC24 designs. Keep the trace length of the I2S data and clock lines matched within 5 mm to preserve bus timing.
Two recurring bugs when bringing up PIC32MX120F064H-I/MR designs: (1) failing to configure PPS before peripheral initialization leaves I2S/SPI on the wrong pins - add the PPS unlock sequence (SYSKEY = 0xAA996655; SYSKEY = 0x556699AA) before any PPS write; (2) leaving CTMU charge-time register at default yields capacitive-touch readings that drift - calibrate TGEN and CTMUCON per the family datasheet. Also note that the 120F064 variant does not include USB or CAN modules, so firmware expecting those will fault silently.
Estimated: at 50 MHz CPU clock and typical HMI workload (PMP refresh, CTMU scan, I2S streaming), the PIC32MX120F064H-I/MR dissipates approximately 60-80 mW. With the 64-QFN (MR) 9x9 mm exposed-pad package and a 4-layer PCB with internal ground plane, theta-JA is roughly 28 C/W, yielding a 2-3 C temperature rise above ambient. Industrial-temperature designs at +85C ambient will see junction temperature around 87-88 C, comfortably below the 125 C maximum. For sealed enclosures without airflow, add copper pours on the top layer stitched to the EP with thermal vias.
Compliance-Informationen
RoHS and lead-free confirmed by Microchip product page; halogen-free status not stated in datasheet. AEC-Q100 not applicable for this commercial/industrial MCU grade.