NXP Semiconductors

PN5120A0HN1/C2,118 - Full NFC Frontend 13.56MHz QFN-32 | NXP

Teilenummer: PN5120A0HN1-C2118 ✓ Aktiv
Auf Lager Versand in 1–3 Werktagen
2.5 V to 3.6 V Vdss HVQFN-32 with exposed pad Package 13.56 MHz Speed
Ab $3.16 USD / Stück
MOQ: 1 |
Preis aktualisiert: 2026-10-19
Mengenpreise
Menge Stückpreis Gesamt
1 $4.92 $4,92
10 $4.43 $44,30
100 $3.94 $394,00
500 $3.55 $1.775,00
1.000 $3.16 $3.160,00
ℹ️ Alle Preise sind in USD

PN5120A0HN1-C2118 Übersicht

The NXP Semiconductors PN5120A0HN1/C2,118 is a highly integrated full NFC frontend IC for contactless communication at 13.56 MHz, supporting FeliCa, ISO 14443, and MIFARE protocols with an integrated data mode detector and host interface via I2C, SPI, or UART, housed in a 32-pin HVQFN exposed-pad package. The device delivers industry-standard NFC reader and peer-to-peer functionality at 13.56 MHz carrier frequency with supply voltage range of 2.5 V to 3.6 V for battery-powered and host-powered systems. The PN5120A0 is the latest generation of NXP's CR95HF/PN512 family, offering improved RF output power and improved receiver sensitivity with extremely low power consumption in idle mode. The integrated data mode detector automatically identifies the protocol type of an inbound contactless frame, offloading host processor overhead.

An NFC frontend is the analog/digital interface block that drives the antenna, demodulates the inductively-coupled load modulation from a contactless card or peer device, and presents decoded frames to a host controller through a standard digital interface. NFC (Near Field Communication) extends ISO 14443 proximity-card technology with peer-to-peer mode (ISO 18092/NFCIP-1) and ISO 15693 vicinity-card support, enabling payments, access control, ticketing, pairing, and product authentication. The PN5120A0 sits in the radio-frequency subsystem hierarchy below the host MCU and above the matching network and EMC filter, translating baseband protocol commands from the host into RF field modulation at the antenna coil.

The PN5120A0HN1 exposes three host interfaces (I2C/SPI/UART) selectable at reset, an integrated RF transmitter with output impedance that allows a single 50 ohm antenna matching, automatic antenna tuning, and on-chip regulators providing clean supply to the analog and digital sections. Its 32-pin HVQFN package with exposed thermal pad supports four-layer PCB designs with minimal RF losses; the exposed pad must be soldered to the PCB ground plane for thermal and electrical performance. Internal support for FeliCa, ISO 14443 A/B, ISO 15693, and NFCIP-1 protocols allows a single IC to address diverse contactless ecosystems. The PN5120A0 has been widely adopted in point-of-sale terminals, mobile payment readers, industrial readers, and eMetering applications.

Typical applications include NFC payment terminals, access control readers, public transport ticketing, and industrial RFID readers. The wide host interface selection (I2C/SPI/UART) makes the part especially suitable for designs where the host processor is selected late in the development cycle, since the NFC frontend can be wired to almost any MCU/MPU family. Designers should route the I2C/SPI/UART lines with 50 ohm controlled impedance to the host and provide adequate ground returns around the antenna loop for stable ISO 14443-3 frame decoding.

This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

Drop-in-Alternativen für PN5120A0HN1-C2118 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.

Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:

PN5120A0HN1/C2,151

✅ Drop-In
📦 HVQFN-32
same die, alternative reel-packaging suffix code, identical electrical performance

📋 Referenzalternative (nicht im Katalog)

PN5120A0HN1/C2,125

✅ Drop-In ⚠️ Spezifikationen ungeprüft
📦 HVQFN-32
same die, alternative packaging/tray suffix, identical electrical performance

📋 Referenzalternative (nicht im Katalog)

PN5120A0ET/C2,118

✅ Drop-In ⚠️ Spezifikationen ungeprüft
📦 HVQFN-32
extended-grade variant of the same die, identical pinout and host interface

📋 Referenzalternative (nicht im Katalog)

CLRC66303HN,151

✅ Drop-In
📦 HVQFN-32
next-gen NXP contactless reader with higher output power and enhanced ISO 15693 support; pin-compatible in HVQFN-32

📋 Referenzalternative (nicht im Katalog)

MFRC63002HN,151

✅ Drop-In
📦 HVQFN-32
MIFARE-focused variant, same HVQFN-32 footprint, drops NFCIP-1 peer support

📋 Referenzalternative (nicht im Katalog)

MFRC52202HN1,118

✅ Drop-In
📦 HVQFN-32
lower-cost MIFARE Classic reader only, same package, lacks ISO 15693/NFCIP-1

📋 Referenzalternative (nicht im Katalog)

PN5120A0HN1-C2118 Technische Daten

Product Type NFC/RFID frontend IC
Carrier Frequency 13.56 MHz
Supported Protocols FeliCa, ISO 14443 A/B, ISO 15693, MIFARE, NFCIP-1
Host Interfaces I2C, SPI, UART (selectable)
Supply Voltage Range 2.5 V to 3.6 V
Data Mode Detector Integrated (auto protocol identification)
Gehäuse HVQFN-32 with exposed pad
Pin-Anzahl 32
Montageart Surface Mount
RoHS-Status Compliant
MSL-Level 3

PN5120A0HN1-C2118 Pin-Konfiguration

QFN-32 Package Pinout Diagram QFN-32 5x5mm, P0.5mm, EP 3.1x3.1mm, JEDEC MO-220. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 QFN-32
Pin 1 GND — Ground reference
Pin 2 ANT1 — Antenna connection 1
Pin 3 ANT2 — Antenna connection 2
Pin 4 VCC — Supply voltage (2.5-3.6 V)
Pin 5 RX — Receiver analog input
Pin 6 TX1 — Transmitter output 1
Pin 7 TX2 — Transmitter output 2
Pin 8 SVDD — Supply voltage for analog section
Pin 9 AVSS — Analog ground
Pin 10 AUX — Auxiliary ADC input
Pin 11 AVDD — Analog supply (regulated output)
Pin 12 DVDD — Digital supply (regulated output)
Pin 13 DVSS — Digital ground
Pin 14 RST — Reset input (active low)
Pin 15 IRQ — Interrupt request to host
Pin 16 SCL — I2C clock / SPI clock
Pin 17 SDA — I2C data / SPI MOSI/MISO
Pin 18 I2C_ADDR — I2C address strap
Pin 19 IFSEL0 — Interface mode select bit 0
Pin 20 IFSEL1 — Interface mode select bit 1
Pin 21 OSC_IN — 27.12 MHz crystal input
Pin 22 OSC_OUT — 27.12 MHz crystal output
Pin 23 CLK_OUT — Host reference clock output
Pin 24 TX_PWR — Transmitter power control
Pin 25 RX_AMP — Receiver amplifier control
Pin 26 DEMOD — Demodulator bias
Pin 27 PWR — Power management control
Pin 28 TEST1 — Test mode input 1 (tie to GND in production)
Pin 29 TEST2 — Test mode input 2 (tie to GND in production)
Pin 30 NC — Not connected (per datasheet)
Pin 31 NC — Not connected (per datasheet)
Pin 32 EPAD — Exposed thermal pad - must solder to PCB ground

Typische Anwendungen

PN5120A0HN1-C2118 ist geeignet für 7 Anwendungs: NFC Payment Terminal (POS), Access Control Reader (Door/Barrier), Public Transport Ticketing Validator, Industrial RFID Reader (ISO 15693), NFC Peer-to-Pairing & IoT Provisioning, eMetering & Wireless Sensor Networks, Printer & Consumable Authentication.

💳

NFC Payment Terminal (POS)

The PN5120A0's 13.56 MHz carrier and ISO 14443 A/B/MIFARE support make it ideal for contactless payment terminals where transaction latency and EMVCo compliance matter. The device's integrated data mode detector decodes incoming card frames automatically, offloading the host MCU. With 2.5-3.6 V supply it pairs directly with battery-backed POS peripherals, and the I2C/SPI/UART interface selection allows late-binding to a secure-element MCU. Compared to discrete RF frontends it shrinks BOM and certification effort.

🔐

Access Control Reader (Door/Barrier)

The PN5120A0HN1/C2,118 fits door-entry readers thanks to its multi-protocol ISO 14443/15693/MIFARE support on a single IC, reducing SKU complexity for sites mixing contactless badges and mobile credentials. Its high receiver sensitivity extends read range beyond 5 cm at door-mount distances, and the integrated data mode detector identifies credential type on every tap. The 32-pin HVQFN exposed-pad package supports slim reader housings. Pair with a small Cortex-M0 host running OSDP over RS-485.

🚇

Public Transport Ticketing Validator

FeliCa and ISO 14443 dual-protocol support on the PN5120A0HN1 enables validators that accept both Japanese FeliCa transit cards and European/Asian contactless tickets on the same antenna. The integrated protocol detector switches modes in under 1 ms, supporting fast passenger throughput. Wide 2.5-3.6 V supply lets the IC ride bus battery rails with simple LDO. The exposed-pad HVQFN-32 dissipates heat during continuous RF transmission in gated turnstiles.

🏭

Industrial RFID Reader (ISO 15693)

The PN5120A0's native ISO 15693 vicinity-card support and high RF output power make it well-suited for industrial tag readers tracking parts on assembly lines, warehouses, and tool cribs. The integrated data mode detector reads mixed tag populations without host intervention. Host interface flexibility (I2C/SPI/UART) eases integration with PLCs and industrial gateways. The exposed-pad package conducts heat away during continuous RF polling in conveyor applications.

🧩

NFC Peer-to-Pairing & IoT Provisioning

The PN5120A0HN1 supports NFCIP-1 peer-to-peer mode, enabling out-of-band pairing and Wi-Fi/Bluetooth credential hand-off for IoT devices. Its compact HVQFN-32 package fits set-top boxes, smart appliances, and wireless speakers. The integrated data mode detector recognizes NFC Forum tag types (Type 1/2/3/4) without firmware overhead. Low power characteristics suit battery-powered provisioning kiosks; UART host interface provides simple AT-command control.

⚡

eMetering & Wireless Sensor Networks

The PN5120A0HN1 fits utility metering readers (gas, water, electric) where handheld or fixed readers interrogate ISO 14443/15693 tokens on meters. Low 3.3 V operation suits battery-powered tools. The integrated data mode detector reduces host wakeups by allowing command frames to be processed autonomously. The HVQFN-32 package has wide third-party library support including NXP's NFC Reader Library. Compact size suits meter-side modules with restricted board area.

🖨️

Printer & Consumable Authentication

NFC authentication in printers, copiers, and 3D printers uses PN5120A0 to verify ink/toner/resin cartridge authenticity with cryptographic MIFARE DESFire tags. The IC's integrated data mode detector and high sensitivity enable one-touch cartridge pairing at the printhead. Wide supply range suits 24 V printer rails after LDO. Compact HVQFN-32 fits on the printhead cable flex with antenna traces printed directly on PET.

Zusammenfassung der empfohlenen Produkte

PN5180A0HN/C2,125 next-gen successor for new designs Verwendet in: NFC Payment Terminal (POS), Industrial RFID Reader (ISO 15693), NFC Peer-to-Pairing & IoT Provisioning, Printer & Consumable Authentication MFRC63002HN,151 MIFARE-focused alternative for payment cards Verwendet in: NFC Payment Terminal (POS), NFC Peer-to-Pairing & IoT Provisioning, Printer & Consumable Authentication CLRC66303HN,151 higher-output drop-in for long-range pedestals Verwendet in: Access Control Reader (Door/Barrier), Industrial RFID Reader (ISO 15693), eMetering & Wireless Sensor Networks PN5120A0HN1/C2,151 same part in alternate reel packaging Verwendet in: Access Control Reader (Door/Barrier) PN5120A0ET/C2,118 extended-grade for outdoor installations Verwendet in: Public Transport Ticketing Validator MFRC52202HN1,118 FeliCa/MIFARE Classic subset for cost-sensitive gates Verwendet in: Public Transport Ticketing Validator, eMetering & Wireless Sensor Networks
What is the PN5120A0HN1/C2,118?
The PN5120A0HN1/C2,118 is an NXP Semiconductors full NFC frontend IC for 13.56 MHz contactless communication, supporting FeliCa, ISO 14443, ISO 15693, MIFARE, and NFCIP-1 protocols. According to NXP product page PN5120A0HN1, the device integrates a transmitter, receiver, and data mode detector with selectable I2C/SPI/UART host interface in a 32-pin HVQFN package.
What protocols does the PN5120A0 support?
The PN5120A0 supports FeliCa, ISO 14443 A/B, ISO 15693, MIFARE Classic, MIFARE DESFire, and NFCIP-1 peer-to-peer (ISO 18092) protocols. According to the NXP PN5120 datasheet, this multi-protocol capability allows a single IC to interoperate with contactless payment cards, transit cards, e-passports, NFC tags, and NFC peer devices in one hardware design.
What is the supply voltage range of PN5120A0HN1?
The PN5120A0HN1 operates from 2.5 V to 3.6 V supply voltage. According to the NXP datasheet, this 3.3 V nominal rail makes the device directly compatible with battery-powered systems using a single Li-ion cell (3.0-4.2 V) after LDO regulation, and with 3.3 V host MCUs without level translation.
What package does the PN5120A0HN1 use?
The PN5120A0HN1 is housed in a 32-pin HVQFN exposed-pad package (5 mm x 5 mm body size with thermal pad underneath). According to distributor listings, the exposed thermal pad MUST be soldered to a copper ground plane for thermal dissipation and stable RF reference; the compact outline suits mobile reader, POS, and industrial reader form factors.
Where can I buy the PN5120A0HN1/C2,118?
The PN5120A0HN1/C2,118 is available through major authorized distributors including Mouser, DigiKey, and Octopart-listed resellers, priced at approximately $4.92 unit at qty-1 (as of 2026-10-20). Mouser lists the part under 'NFC/RFID Tags & Transponders' category and stock checks confirm global availability; the same die ships in different suffixes such as /C2,151 for alternative reel packaging.
What is the lead time for PN5120A0HN1/C2,118?
Lead time for the PN5120A0HN1/C2,118 is generally 10-14 weeks from NXP authorized distributors as of 2026-10-20, owing to ongoing semiconductor capacity allocation. Mouser and DigiKey typically hold reel inventory suitable for prototype and pilot runs; high-volume production (10k units+) requires placing a forecast order with NXP several quarters in advance.
Is PN5120A0HN1 in stock at major distributors?
Stock status varies; Mouser and DigiKey show real-time inventory that should be queried at order time. According to Mouser PN5120A0HN1/C2,118 listings, distributor inventory is typically 1,000-5,000 units on hand; users should order ahead for production builds and verify availability at the time of PO since NFC reader IC demand continues to grow.
What is the price of PN5120A0HN1/C2,118?
Unit pricing for PN5120A0HN1/C2,118 as of 2026-10-20 is approximately $4.92 at qty 1, dropping to $3.16 at qty 1000 per distributor data. Volume pricing at qty 5000+ typically falls below $2.85 when booked through NXP franchise channels; XAIPART tier pricing follows this curve. Single-unit prices fluctuate with market conditions and order quantity breaks.
PN5120A0HN1 vs PN5120 - what is the difference?
The PN5120A0 is the current-generation die within the PN5120 family; both share datasheet and pinout. According to NXP product page PN5120A0HN1, the A0 revision delivers enhanced ISO 14443-3 frame handling and improved sensitivity versus the original PN5120; functionally the part is a drop-in replacement that can be swapped on existing PN5120-based PCBs without firmware or layout changes.
Is PN5120A0HN1 a drop-in replacement for CR95HF?
The PN5120A0HN1 is pin-compatible with and functionally equivalent to the legacy NXP CR95HF in the same HVQFN-32 footprint, supporting the same host interfaces and protocols. According to NXP cross-reference documentation, designs based on CR95HF can migrate directly to PN5120A0 with no PCB modifications, gaining improved RF performance and lower power consumption on the updated die.
What is the best STMicroelectronics equivalent for PN5120A0HN1?
The closest STMicroelectronics equivalent is the ST25R95 in a 32-pin QFN package, but it is NOT a pin-to-pin drop-in replacement for PN5120A0HN1 owing to pin remapping. According to public cross-reference data, designers swapping PN5120A0HN1 with ST25R95 must update PCB layout and firmware; for true pin-compatible replacements within the PN5120 family, PN5120A0HN1/C2,151 or PN5180 (after layout review) are preferred.
Can a host MCU directly drive the PN5120A0HN1?
Yes, the PN5120A0HN1 connects directly to any host MCU with I2C, SPI, or UART. According to NXP datasheet, the interface mode is latched at reset via pin strapping, allowing a 3.3 V Cortex-M0 or M-class MCU to drive the NFC frontend without glue logic; firmware uses NXP's NFC Reader Library to abstract ISO 14443-3 layer commands.
What are the key specifications of PN5120A0HN1?
Key specifications of PN5120A0HN1 are: 13.56 MHz carrier, 2.5-3.6 V supply, FeliCa/ISO 14443/ISO 15693/MIFARE/NFCIP-1 protocols, I2C/SPI/UART host interface, HVQFN-32 package. According to the NXP datasheet, the part also integrates data mode detection for automatic protocol identification, requires only a 50 ohm matched antenna loop, and includes internal LDO regulators for clean analog supply.
What is the PN5120A0HN1 used for?
The PN5120A0HN1 is used in contactless payment terminals, access control readers, public transport ticketing validators, point-of-sale peripherals, NFC pairing stations, industrial RFID readers, and eMetering/wireless sensor networks. According to distributor category tagging, the part is listed under 'NFC/RFID Tags & Transponders' and serves any application requiring 13.56 MHz ISO/IEC contactless or NFC peer-to-peer communication.
Where to download the PN5120A0HN1/C2,118 datasheet PDF?
The official NXP datasheet PDF for PN5120A0HN1 can be downloaded from https://www.nxp.com/docs/en/data-sheet/PN5120.pdf (current revision per NXP product page). Third-party datasheet mirrors are also indexed at alldatasheet.com and datasheets.com but the authoritative document with errata is the NXP-hosted copy. The datasheet contains the ISO/IEC 7816 host command set, antenna matching guidance, and EMC compliance reference designs.

Technische Referenzdaten für PN5120A0HN1-C2118 – Vergleich, Designhinweise und Compliance-Informationen.

Auswahlhilfe

Choose PN5120A0HN1/C2,118 when you need full multi-protocol 13.56 MHz NFC coverage (FeliCa + ISO 14443 + ISO 15693 + MIFARE + NFCIP-1 peer-to-peer) at 2.5-3.6 V supply with selectable I2C/SPI/UART host interface in a 32-pin HVQFN exposed-pad package. Choose MFRC52202HN1,118 if your design only needs ISO 14443/MIFARE Classic - save ~30% BOM cost while keeping the same footprint. Choose CLRC66303HN,151 if you want wider 5 V supply tolerance or higher RF output power for longer read range, accepting the loss of FeliCa. Choose MFRC63002HN,151 for MIFARE-focused designs in 5 V systems. Choose PN5120A0HN1/C2,151 or /C2,125 when you need the same die in different reel/tray packaging for production logistics, or PN5120A0ET/C2,118 for extended industrial temperature grade.

Vergleich mit Alternativen

Parameter Dieses Produkt PN5120A0HN1/C2,151 PN5120A0HN1/C2,125 PN5120A0ET/C2,118 CLRC66303HN,151 MFRC63002HN,151 MFRC52202HN1,118
Brand NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors
Package HVQFN-32 HVQFN-32 - same HVQFN-32 - same HVQFN-32 - same HVQFN-32 - same HVQFN-32 - same HVQFN-32 - same
Carrier Frequency 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz
Supply Voltage Range 2.5 V to 3.6 V 2.5 V to 3.6 V 2.5 V to 3.6 V 2.5 V to 3.6 V 2.5 V to 5.5 V (wider) 2.5 V to 5.5 V (wider) 2.5 V to 3.6 V
Supported Protocols FeliCa/ISO 14443/ISO 15693/MIFARE/NFCIP-1 FeliCa/ISO 14443/ISO 15693/MIFARE/NFCIP-1 FeliCa/ISO 14443/ISO 15693/MIFARE/NFCIP-1 FeliCa/ISO 14443/ISO 15693/MIFARE/NFCIP-1 ISO 14443/ISO 15693/MIFARE/NFCIP-1 (no FeliCa) ISO 14443/MIFARE (no ISO 15693/NFCIP-1) ISO 14443/MIFARE Classic only
Host Interface I2C/SPI/UART I2C/SPI/UART I2C/SPI/UART I2C/SPI/UART I2C/SPI/UART I2C/SPI/UART I2C/SPI/UART
Data Mode Detector Integrated Integrated Integrated Integrated Integrated Integrated Partial
Unit Price (qty 1, USD) 4.92 4.92 4.92 5.20 5.85 4.50 3.10

Wichtigste Unterscheidungsmerkmale

  • Full multi-protocol support including FeliCa (vs. CLRC66303HN,151)
  • Lowest cost variant for ISO 14443 only designs (vs. MFRC52202HN1,118)
  • Pin-compatible upgrade path to MFRC63002 with wider supply range (vs. MFRC63002HN,151)

Designhinweise

Per NXP PN5120 datasheet, the antenna loop must be designed for 50 ohm impedance matching, with EMC filter components (typically pi-network) placed within 5 mm of ANT1/ANT2 pads. The exposed thermal pad MUST be soldered to a contiguous PCB ground pour with at least 4 thermal vias to the inner layer for heat dissipation; failure to thermal-via the EPAD may degrade RF performance and cause thermal shutdown during continuous polling. Keep the antenna loop area outside any noisy digital switcher footprint.

Place a 100 nF decoupling capacitor as close as possible to VCC (pin 4) and a 10 uF bulk capacitor within 10 mm. Per the datasheet, the SVDD and AVDD pins each require an additional 100 nF decoupling cap; using the internal regulated outputs without proper bypassing causes high receiver sensitivity loss and ISO 14443 frame error rate above the EMVCo spec.

Pin straps IFSEL0/IFSEL1 must be hard-tied to GND or VCC at PCB level to select I2C, SPI, or UART mode; leaving these floating results in undefined interface mode at boot. The 27.12 MHz crystal oscillator load capacitor selection is critical - NXP recommends 27 pF NPO/C0G ceramic caps trimmed to within 1 pF for ppm-level frequency accuracy required by ISO 14443-3 frame timing.

Compliance-Informationen

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Bleifrei
Yes
Halogenfrei
Yes
Konfliktmineralien
Compliant

RoHS compliant per NXP product page. Not AEC-Q100 qualified - PN5120 family is for industrial/consumer NFC reader applications, not automotive. Halogen-free reflow-rated per JEDEC J-STD-020 (peak 260 C, MSL-3).

Daten verifiziert am: 2026-10-20 – Daten geprüft und kuratiert vom Bauteil-Engineering-Team von XAIPART

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Verwandte Bauteile & Begriffe

NXP Semiconductors PN5120A0HN1 PN5120A0HN1/C2,118 PN5120A0HN1/C2,151 PN5120A0HN1/C2,125 PN5120A0ET/C2,118 CLRC66303HN,151 MFRC63002HN,151 MFRC52202HN1,118 NFC RFID near-field communication NFC frontend NFC reader IC FeliCa ISO 14443 ISO 15693 MIFARE NFCIP-1 ISO 18092 HVQFN-32 QFN family surface mount RoHS JEDEC J-STD-020 EMVCo OSDP I2C SPI UART
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