Circuitos integrados

TS3A4751PWR

TS3A4751PWR - 0.9-Ohm Quad SPST Analog Switch | Texas Instruments

The Texas Instruments TS3A4751PWR is a bidirectional, 4-channel, normally-open (NO) single-pole single-throw (SPST) analog switch in a 14-pin TSSOP package. It operates from a single 1.6V to 3.6V supply, delivers a maximum on-state resistance of 0.9 ohm at a 3V supply, and handles rail-to-rail analog signals with fast switching speeds and very low quiescent power. An analog switch is an IC that routes or isolates analog signal paths under digital control. Within the signal-routing hierarchy, the TS3A4751 belongs to the SPST switch family, a subset of analog switches and multiplexers used in signal conditioning and power-management systems. Key features include 0.9-ohm maximum Ron at 3V (1.5-ohm maximum at 1.8V), Ron flatness of 0.4-ohm maximum at 3V, and Ron matching of 0.05-ohm maximum at 3V. The 1.8-V CMOS-compatible digital inputs allow direct interface with low-voltage GPIO when using a 3-V supply, eliminating level-shift circuitry. The device is available in 14-pin TSSOP (PW), 14-pin VQFN (RGY), and 2x2-mm micro X2QFN (RUC) packages. The low Ron supports power-switching and low-distortion signal paths, while rail-to-rail operation preserves full signal swing on 1.8V, 2.5V, and 3.3V rails. Typical applications include low-voltage power switching, audio signal routing in portable devices, battery-powered test points, and general-purpose signal muxing in smartphones, tablets, and industrial sensing modules. Its normally-open configuration makes it suitable for fail-safe, default-disconnected paths. When designing, remember that Ron rises at lower supply voltages: at a 1.8-V supply the maximum Ron is 1.5 ohm, so account for insertion loss and on-resistance flatness in high-fidelity or precision-current paths. According to TI datasheet, the TS3A4751 is the NO-switch counterpart within the TI low-voltage quad SPST family.

USD $0,31 En stock

TS3A5018PWR

TS3A5018PWR - 10-Ohm Quad SPDT Analog Switch | Texas Instruments

The Texas Instruments TS3A5018PWR is a quad single-pole double-throw (SPDT) analog switch designed to operate from a 1.8V to 3.6V supply in a 16-pin TSSOP (PW) package rated from -40C to +85C. It handles both digital and analog signals, and signals up to V+ can be transmitted in either direction. An analog switch is a semiconductor device that selectively connects or disconnects an analog signal path under digital control. It is a fundamental signal-routing building block in the broader family of multiplexers, demultiplexers, and interface ICs. Analog switches provide a low-resistance path when ON and a high-impedance path when OFF, replacing bulky mechanical relays in audio/video routing, data acquisition, and communication systems. Key features include the wide 1.8V to 3.6V operating range (ideal for battery-powered and 3.3V systems), low 10-ohm ON-state resistance with excellent channel-to-channel matching, and low charge injection that minimizes glitches during switch transitions. All four SPDT switches share a common enable function so the entire device can be disabled to reduce power consumption. The TS3A5018 is built on TI CMOS process technology, providing low quiescent power dissipation and high reliability. Bidirectional signal flow means either of the two throw terminals can serve as the port, essential for multiplexing and demultiplexing on the same hardware. Turn-on and turn-off times are fast, supporting high-speed signal routing in data converters and communication interfaces. Typical applications include audio signal routing in portable devices, battery-powered data acquisition front ends, communication interface switching, and test equipment signal multiplexing. The low power consumption and wide supply range make it well suited for portable and industrial designs. Design consideration: the 10-ohm ON resistance introduces series attenuation in high-impedance circuits, so prefer low-impedance loads or buffer the switched node. Place a 0.1uF decoupling capacitor close to the V+ pin, and use the enable pin in battery designs to cut standby current when switching is idle.

USD $0,24 En stock

TS3A5018QPWRQ1

TS3A5018QPWRQ1 - 10-Ohm Quad SPDT Analog Switch | Texas Instruments

The Texas Instruments TS3A5018QPWRQ1 is an automotive-qualified (AEC-Q100) quad single-pole double-throw (SPDT) analog switch designed to operate from a 1.8V to 3.6V supply. Packaged in a 16-pin TSSOP (PW), it provides four independent SPDT switches with a low 10-ohm on-resistance, handling both digital and analog signals up to V+ in either direction. An analog switch (also called an analog multiplexer/demultiplexer or bidirectional switch IC) is a semiconductor device that routes analog or digital signals through a MOSFET transmission gate controlled by a digital select input. Analog switches sit within the broader signal-routing hierarchy: analog switch IC -> signal multiplexer -> interface and switching IC -> analog signal chain. They are fundamental building blocks wherever a processor must dynamically reconfigure signal paths without degrading signal integrity. Key features of the TS3A5018QPWRQ1 include the low 10-ohm typical on-resistance, wide 1.8V to 3.6V single-supply operation suited to battery-powered and low-voltage systems, full rail-to-rail signal handling, and break-before-make switching that prevents momentary shorting of signal sources. The Q1 suffix denotes AEC-Q100 qualification for automotive environments, with an extended operating temperature range supporting under-hood and body electronics applications. The device uses CMOS transmission-gate architecture, which keeps on-resistance relatively flat across the signal range and minimizes signal distortion for audio and data-routing tasks. Because signals up to V+ can pass in either direction, the switches work equally well for multiplexing and demultiplexing, such as sharing a codec between microphone and headset paths or switching antenna and test signals. Typical applications include automotive infotainment audio routing, battery-management cell-monitoring multiplexing, portable instrument signal switching, and general-purpose I/O expansion in industrial control boards. Design tip: minimize RON signal loss by keeping source impedance low, and always provide a solid V+ decoupling capacitor (0.1uF close to the pin). Remember that the analog signal range is limited to the 0V-to-V+ supply window; signals outside this range must be blocked or level-shifted.

USD $0,45 En stock

TS3USB3000MRSER

TS3USB3000MRSER - DPDT USB 2.0/MHL Switch | TI | UQFN-10

The Texas Instruments TS3USB3000MRSER is a double-pole, double-throw (DPDT) analog switch that combines a USB 2.0 High-Speed (480 Mbps) switch and a Mobile High-Definition Link (MHL) switch in a single 10-pin UQFN (RSE) package measuring 1.5 mm × 2.0 mm. It supports a -3 dB bandwidth of 6.1 GHz on the MHL path and operates from a 2.3 V to 4.8 V supply. The device is designed to share a common USB or Micro-USB connector between USB 2.0 data and MHL video signals in mobile phones, tablets, and portable media devices. A USB switch IC is a special-purpose analog multiplexer that routes high-speed differential signals between a single downstream port and two upstream paths (host vs. MHL sink). In the hierarchy of power management and signal routing components, this part belongs to the USB interface IC category, sitting between the connector and the application processor. DPDT switches such as the TS3USB3000 are critical because they must pass 480 Mbps USB signals and up to 3 GHz MHL content with minimal insertion loss, low crosstalk, and high off-isolation. Key features of the TS3USB3000 include low on-resistance (Ron) on the USB data paths, low on-capacitance (Con) for high-bandwidth signal transmission, 1.8-V-compatible select pins for direct GPIO control from a mobile processor, and a quiescent current of approximately 5 uA. The wide supply range (2.3 V to 4.8 V) covers both 3.3 V system rails and the typical 3.8 V Li-ion battery range without additional regulation. The small 1.5 mm × 2 mm UQFN footprint makes it ideal for space-constrained mobile applications. The TS3USB3000 uses a charge-pump-less architecture with simple CMOS logic-level select inputs. The two select pins (S1 and S0 per TI documentation) determine whether the common port is routed to the USB path or the MHL path. Internal ESD protection on the signal pins improves robustness against connector-level transients, which is critical for hot-plug consumer electronics. Typical applications include smartphones and tablets with MHL-enabled video output, automotive infotainment systems that mirror mobile content via USB or MHL, portable media players, and USB/MHL dongles. The wide bandwidth also makes it suitable for any system needing to multiplex two high-speed differential pairs onto a single connector. When designing with this part, place the device as close as possible to the USB/MHL connector to minimize stub lengths and signal-integrity degradation. Use controlled-impedance differential routing (90 ohm) on both sides of the switch, and provide adequate ground stitching vias along the signal path to maintain return-current continuity. This page synthesizes distributor pricing, pin-compatible alternatives, and practical design notes that are not aggregated in any single manufacturer datasheet or distributor catalog page.

USD $0,62 En stock

TS512IN

TS512IN - 3MHz Dual Precision Op Amp | STMicroelectronics

The STMicroelectronics TS512IN is a precision dual operational amplifier with a 3 MHz gain-bandwidth product, 1.5 V/µs slew rate, and a maximum input offset voltage of 500 µV, supplied in an 8-pin Mini DIP package. It is designed for general-purpose instrumentation, analog signal conditioning, and dual-channel measurement applications where two amplifiers share the same package. A dual operational amplifier is an analog integrated circuit containing two independent amplifier channels. Operational amplifiers are voltage amplifiers whose behavior depends mainly on external feedback components. The TS512IN combines frequency-compensated amplifiers for stable voltage-follower operation, low distortion, low noise, short-circuit protection, and internal ESD protection. The 3 MHz gain-bandwidth product supports useful closed-loop bandwidth well below 3 MHz at higher noise gains, while the 1.5 V/µs slew rate improves response to larger transient signals. A maximum offset voltage of 500 µV helps reduce DC error in precision feedback networks. Its dual-channel organization reduces package count and simplifies PCB routing when two amplified signals must be processed under shared supply conditions. The device operates from single 6 V to dual ±15 V supplies, matching conventional analog and industrial voltage ranges. Internal phase compensation allows voltage-follower use without an external compensation network. Short-circuit protection limits the effects of output overload, although sustained shorts still require appropriate supply and thermal checks. Internal ESD protection improves handling robustness without eliminating the need for normal assembly precautions. TS512IN applications include sensor-interface amplification, low-frequency instrumentation, dual audio-channel control, buffering, active filtering, and general analog signal conditioning. Designers should place input and feedback components close to their associated pins, observe the specified common-mode and output-current limits, and avoid excessive loading near the bandwidth and slew-rate limits. This product page combines verified manufacturer-linked specifications, source URLs, package information, application guidance, and honest comparison limitations. It distinguishes confirmed TS512IN attributes from parameters that require verification before a PCB or production cross-reference is approved.

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TS555CD

TS555CD - 2.7MHz CMOS Timer | STMicroelectronics | SOIC-8

STMicroelectronics TS555CD is a single CMOS 555-type timer/oscillator operating from 2 V to 16 V, with a maximum frequency of 2.7 MHz and typical supply current of 100 µA at VCC = 5 V. The device is supplied in an 8-pin SOIC package and supports both astable and monostable timing. Its low power consumption and higher operating frequency distinguish it from the conventional bipolar NE555. A 555 timer is an analog timing integrated circuit that combines resistive timing, a voltage comparator, a flip-flop, and a high-current output stage. Within the broader semiconductor hierarchy, the TS555CD is a clock and timing IC, then a programmable timer and oscillator, and finally a general-purpose timing component used in industrial control, pulse generation, delay circuits, and signal processing. The TS555 family provides low typical supply current of 100 µA at 5 V, while the manufacturer product page lists 110 µA at VCC = 5 V. Its maximum astable frequency is 2.7 MHz, compared with 0.1 MHz for the conventional NE555. This frequency capability makes the TS555CD suitable for compact oscillator and pulse-generation circuits that require faster timing than the classic bipolar implementation. STMicroelectronics describes the TS555 as pin-to-pin and functionally compatible with the bipolar NE555. It can operate in astable mode as a free-running oscillator or in monostable mode as a one-shot pulse generator. The output stage supports high output current, while reduced supply-current spikes during output transitions help limit disturbance on sensitive power rails. Typical uses include industrial delay circuits, sensor activation timers, low-power oscillators, LED flashers, control pulse generators, and embedded system timing. Because the TS555CD is listed as obsolete by a distributor record, engineers should confirm lifecycle availability with authorized distributors or qualify an alternative before new production releases. Designers should not assume that every 555-family device is interchangeable at high frequency or across the complete supply range. Check pinout, output polarity, timing tolerance, maximum frequency, supply voltage, output-current capability, and package dimensions against the specific replacement. Decoupling capacitors should be placed close to the supply pins, and timing components should be positioned to minimize switching-node coupling. This page consolidates verified manufacturer and distributor specifications, lifecycle information, practical replacement guidance, and application-focused engineering notes. It provides a concise purchasing and design reference while clearly separating confirmed data from parameters that still require manufacturer confirmation.

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TS555CN

TS555CN - 2.7MHz Low-Power CMOS Timer | STMicroelectronics

The STMicroelectronics TS555CN is a low-power, single CMOS timer with a maximum astable frequency of 2.7 MHz, a typical supply current of 100 µA at 5 V, and an operating supply range up to 18 V, housed in an 8-pin DIP package. It provides the familiar 555 timer functions in astable and monostable configurations while offering pin-to-pin and functional compatibility with the bipolar NE555. A 555 timer is a programmable timing IC that combines a resistor, capacitor, and internal threshold comparator into a compact oscillator or one-shot pulse generator. The TS555CN belongs to the CMOS timer, oscillator, and clock-and-timing hierarchy: it can generate continuous periodic waveforms in astable mode or produce a timed output pulse in monostable mode. Its CMOS implementation is especially useful in low-power and higher-frequency circuits where lower supply current than a conventional bipolar NE555 is valuable. Key features include very low typical supply current, a maximum astable frequency of 2.7 MHz, wide operating voltage support to 18 V, high input impedance, and output compatibility with TTL, CMOS, and logic families. According to the STMicroelectronics manufacturer datasheet, typical supply current is 110 µA at 5 V and 90 µA at 3 V, with reduced current spikes during output transitions. These characteristics make the device practical for portable timing, pulse generation, debouncing, and periodic-control applications. Internally, the TS555CN uses CMOS circuitry to implement the comparator, flip-flop, discharge transistor, and timing-control functions of a standard 555 timer. In astable operation, two external resistors and one capacitor establish the oscillation period; in monostable operation, one resistor and one capacitor set the pulse width. The external timing elements determine practical accuracy, while the timer provides repeatable thresholding and state control. Typical uses include low-power delay circuits, oscillator clocks, LED flashers, pulse generators, debounce networks, and control timing in embedded equipment. The TS555CN can also replace a standard NE555 where the circuit permits CMOS supply current and operating-voltage differences. Before substitution, verify trigger-level, output-drive, timing-tolerance, and maximum-frequency requirements against the actual design. For PCB layout, keep the timing capacitor and resistor leads short, connect the decoupling capacitor close to VCC and GND, and avoid long traces around high-impedance threshold and control pins. Because the DIP package has exposed through-hole leads, mechanical spacing and soldering cleanliness should also be considered. This page combines manufacturer specifications, verified distributor information, replacement guidance, and practical design notes for engineering selection.

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TS555ID

TS555ID - 2.7MHz Low-Power CMOS Timer | STMicroelectronics

The STMicroelectronics TS555ID is a single CMOS 555-type timer and oscillator with a 2.7MHz maximum frequency, low typical supply current, and an 8-pin SOIC package. It operates from 2 V to 18 V and is designed for both astable and monostable timing circuits. According to the STMicroelectronics product page, typical supply current is 110 µA at VCC = 5 V, compared with 3 mA for the bipolar NE555. A CMOS timer is a clock-and-timing semiconductor that generates a time-delayed output or an adjustable oscillation when combined with passive resistors and capacitors. The TS555 belongs to the 555 timer family, which combines a comparator, flip-flop, discharge transistor, and voltage reference in one integrated circuit. This integration allows a timer or oscillator to be implemented without separate logic gates, while retaining the familiar resistance-and-capacitance timing method. The TS555ID provides a maximum astable frequency of 2.7 MHz, substantially higher than the 0.1 MHz maximum cited for the NE555 in the supplied manufacturer data. Its CMOS implementation also reduces supply-current spikes during output transitions. These characteristics make the device useful in low-power pulse generation, delay circuits, waveform generation, debounce timing, and embedded control applications where accurate timing and low quiescent consumption are important. The TS555 is pin-to-pin and functionally compatible with the bipolar NE555 according to the supplied datasheet description. Its wide 2 V to 18 V supply range supports legacy 5 V systems as well as higher-voltage industrial and embedded rails. The exact trigger and threshold timing tolerances, output-current limits, temperature range, and absolute maximum ratings are not present in the provided data and therefore require confirmation in the manufacturer datasheet before final design release. Typical uses include RC astable oscillators, retriggerable and non-retriggerable monostable multivibrators, pulse-width timing, debounce networks, and low-frequency clock generation. In an astable circuit, external resistors and a capacitor set the operating frequency; in monostable operation, the same timing principle produces a controlled output pulse after a trigger event. Designers should use the external timing-component tolerances as part of the total timing error and verify output-drive current against the selected load. Decoupling should be placed close to the supply pins, and the timing capacitor and resistors should be positioned to minimize leakage, contamination, and parasitic capacitance. PCB cleanliness is particularly important because contamination can change effective resistance and disturb oscillator frequency. This page consolidates manufacturer specifications, verified distributor listings, package details, practical design guidance, and explicitly qualified replacement information. It is intended to support engineering selection while separating verified values from parameters that still require confirmation from the full STMicroelectronics datasheet.

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TS556CD

TS556CD - Dual CMOS Timer, 2.7MHz, 14-SOIC | STMicroelectronics

The STMicroelectronics TS556CD is a low-power dual CMOS 555-type timer and oscillator with a maximum frequency of 2.7 MHz, a 2 V to 16 V supply range, and a 14-pin SOIC package. The device combines two independent timer sections, low typical supply current, and pin-to-pin and functional compatibility with the bipolar NE556, making it suitable for precision timing, pulse generation, delay, and oscillator circuits. A 555-type timer is an analog timing integrated circuit that compares an externally controlled voltage with threshold and trigger levels. In monostable mode, it produces one timed output pulse; in astable mode, it oscillates continuously when configured with external resistors and capacitors. The TS556CD uses CMOS circuitry to reduce power consumption while retaining the familiar dual-timer architecture. Key verified features include a maximum astable frequency of 2.7 MHz, low-power operation, and supply current listed in the source data at approximately 130 µA in one distributor summary, while the manufacturer-family description specifies 220 µA typical at VCC = 5 V for TS556. The discrepancy reflects different device variants or source summaries; application designs should verify the exact datasheet value for the ordered part. The 14-SOIC package is suitable for conventional PCB assembly and through-hole-compatible external connections. The TS556CD is useful in pulse-width generation, delay circuits, waveform generation, LED flashing, industrial control timing, low-power signal generation, and embedded control systems. Its dual sections allow two timers in one package when board area is constrained. Because timing accuracy depends on resistor tolerances, capacitor stability, supply variation, and output loading, those components should be selected for the target frequency and temperature range. The principal design consideration is confirming output drive, supply voltage, timing limits, and pin-level compatibility with the surrounding circuit. The manufacturer describes the family as functionally and pin-to-pin compatible with the bipolar NE556, but load conditions and supply-specific timing behavior still require review before substitution. The TS556CD is listed as obsolete by one distributor source, so procurement should confirm lifecycle status and availability before committing to a production design. This page combines the verified TS556CD specifications, sourcing information, lifecycle observations, and application guidance to support design triage. It also highlights why a same-package timer replacement must be checked for frequency, voltage, timing, and output-load compatibility rather than selected by footprint alone.

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TS556CN

TS556CN - Dual 2.7MHz CMOS Timer | STMicroelectronics

The STMicroelectronics TS556CN is a dual low-power CMOS timer with two independent 555-compatible timing sections, a maximum astable frequency of 2.7 MHz, and a 14-DIP package. Its verified supply-voltage range is 2 V to 16 V, while one secondary result describes the family operating to 18 V; the exact maximum for this orderable device must therefore be confirmed from its datasheet before use. The TS556CN provides 180 µA typical supply current at 3 V and is designed for accurate monostable and astable operation. A CMOS timer is a programmable time-delay and oscillator integrated circuit. It belongs to the timer/oscillator category, within clock and timing ICs and broader semiconductor devices. Each timer section uses external resistors and capacitors to set delay or oscillation behavior, making this device useful where conventional 555-type timing, pulse generation, delay, and repetitive switching are required without a microcontroller. Key verified attributes include dual-timer construction, operation from 2 V to 16 V, a high maximum astable frequency of 2.7 MHz, and pin-to-pin and functional compatibility with bipolar NE556 devices. Reduced supply-current spikes during output transitions can permit lower decoupling capacitance than a conventional bipolar implementation. The stated 180 µA typical current at 3 V supports battery-conscious designs, although load and switching conditions must be checked against the datasheet. The TS556CN uses CMOS circuitry to combine low quiescent consumption with higher timer frequency than the bipolar NE556 comparison cited in the search data. That comparison reports 2.7 MHz maximum frequency for TS556 versus 0.1 MHz for NE556. However, actual operating frequency depends on timing resistors, capacitors, propagation delays, output loading, and supply voltage, so high-frequency layouts require short traces and careful grounding. Typical uses include LED and lamp flashers, pulse generators, delay stages, debounce or retriggerable timing networks, simple oscillators, industrial control timers, and low-power instrumentation. The 14-DIP through-hole package favors prototypes, educational designs, repairable assemblies, and human-built electronics where a socketed or perforated-board implementation is practical. Design with the two timer sections independently unless datasheet pin behavior explicitly permits shared connections. Place timing components close to their associated pins, bypass the supply near the device, and account for output-current limits and threshold tolerances. Because the web evidence provides conflicting voltage-range wording, use the 2 V to 16 V range for this listing and verify absolute maximum and operating limits before releasing production hardware. This page combines verified distributor and datasheet findings, package-aware replacement analysis, and practical timer-circuit guidance. It also distinguishes documented TS556CN data from specifications that were not supplied, avoiding unsupported claims about pricing, lifecycle, compliance, or exact pin assignments.

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TS556ID

TS556ID - Dual 2.7MHz CMOS Timer | STMicroelectronics

The STMicroelectronics TS556ID is a dual CMOS 555-type timer and oscillator with two independent timing sections, operation from 2 V to 16 V, a maximum astable frequency of 2.7 MHz, and typical supply current of 220 µA at 5 V. It is supplied in a 14-pin SOIC package. The TS556ID combines 555 timer compatibility with CMOS power efficiency and higher timing frequency than the traditional bipolar NE556. A 555-type timer is a programmable clock and timing semiconductor that can operate as a monostable one-shot or astable oscillator. In system hierarchy, the TS556ID belongs to clock and timing ICs, timer ICs, oscillators, and semiconductors. Each internal timer provides resistive and capacitive timing inputs, trigger and reset controls, and an output stage. Two independent sections allow one circuit to generate two events, delays, tones, or periodic waveforms. The verified data identifies the TS556 as a pin-to-pin and functionally compatible bipolar NE556 design, while reducing typical supply current to 220 µA at a 5 V supply. Another source lists 180 µA typical at 3 V. Its 2.7 MHz maximum astable frequency allows shorter timing periods and higher-frequency waveform generation than a 0.1 MHz NE556, subject to the datasheet's timing limits, component tolerances, and output-drive conditions. The TS556ID supports monostable and astable operating modes. In monostable service, an external trigger produces a timed output pulse whose duration is determined primarily by external resistance and capacitance. In astable service, external timing components charge and discharge an internal node, producing continuous oscillation. Engineers should calculate the timing values from the manufacturer datasheet, include realistic resistor and capacitor tolerances, and verify output rise and fall behavior in the intended load. Typical uses include low-power pulse generation, delayed actuator triggering, LED and indicator flashing, audible tones, small signal-clock generation, industrial control timing, and embedded system timing support. The dual architecture is especially useful when two related but nonsynchronous events are needed. Compared with a NE556, the principal benefits are lower typical consumption and a substantially higher maximum astable frequency; NE556 compatibility does not mean every electrical limit is identical. Design with the 2 V to 16 V supply range in mind, especially the output behavior at low supply voltage. Keep the reset and trigger paths free of unwanted noise, select timing-component tolerances for the required frequency accuracy, and provide the bypass and output-loading conditions required by the datasheet. Because timing accuracy depends on real component values and parasitics, breadboard validation is advisable for high-frequency or precision intervals. This page combines verified manufacturer and distributor information, practical timing guidance, and a conservative assessment of drop-in replacements. It distinguishes documented electrical facts from parameters that require datasheet confirmation, helping engineers locate the TS556ID datasheet, evaluate purchasing options, and decide whether a same-package substitute is suitable for an existing PCB.

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TS5A2053

TS5A2053 - 10Ω SPDT Analog Switch | Texas Instruments

The TS5A2053 is a single-pole double-throw (SPDT) analog switch from Texas Instruments, designed to operate from 1.65 V to 5.5 V. It can handle both digital and analog signals, and signals up to V+ can be transmitted in either direction. The device features a low ON-state resistance of 10Ω (typical) and includes an enable pin for power management. It is available in the 8-pin VSSOP (DCU) package, making it suitable for space-constrained applications. An analog switch is a semiconductor device that selectively connects or disconnects an analog signal path based on a digital control signal. It is a fundamental building block in signal routing, multiplexing, and sample-and-hold circuits. Analog switches are part of the broader category of interface ICs, which manage signal integrity and connectivity between different subsystems in electronic systems. Key features of the TS5A2053 include a low ON-state resistance of 10Ω, which minimizes signal attenuation, and a wide operating voltage range from 1.65 V to 5.5 V, allowing compatibility with various logic levels. The device also offers fast switching speeds, with a typical turn-on time of 20 ns and turn-off time of 15 ns, making it suitable for high-frequency signal routing. The enable pin allows the switch to be disabled, reducing power consumption in standby modes. Technically, the TS5A2053 uses a CMOS process that provides low power consumption and high ESD robustness. The device has a bandwidth of 300 MHz, enabling it to pass high-frequency signals with minimal distortion. The ON-state resistance is flat across the input voltage range, ensuring consistent performance. The device also features break-before-make switching, preventing momentary short circuits between channels. Typical applications include audio signal routing, data acquisition systems, and test equipment. In audio systems, the low ON-state resistance and high bandwidth ensure minimal signal degradation. In data acquisition, the switch can route analog signals to an ADC, with the enable pin allowing power saving when not in use. In test equipment, the TS5A2053 can be used for signal multiplexing and routing. When designing with the TS5A2053, it is important to consider the ON-state resistance and its effect on signal integrity. For high-frequency signals, the parasitic capacitance of the switch can cause signal attenuation, so proper PCB layout and termination are recommended. Additionally, the enable pin should be tied to a defined logic level to avoid floating inputs.

USD $0,20 En stock

TS5A3159QDBVRQ1

TS5A3159QDBVRQ1 - 1Ω SPDT Analog Switch AEC-Q100 | TI

The Texas Instruments TS5A3159QDBVRQ1 is an automotive-qualified (AEC-Q100) single-pole double-throw (SPDT) 2:1 analog switch with 1Ω typical ON-state resistance (1.3Ω max), operating from a 1.65V to 5.5V supply in a 6-pin SOT-23 (DBV) package. An analog switch is a semiconductor device that routes or gates analog and digital signals under the control of a logic-level input. Within the signal-chain hierarchy, the SPDT analog switch sits in the analog switches and multiplexers family, below large multiplexer arrays and alongside transmission-gate logic. An SPDT device connects one common (COM) terminal to either of two throw terminals (NO or NC), making it the fundamental building block of signal routing and redundancy switching. Key features include break-before-make switching, which prevents momentary channel shorting during transition and eliminates signal distortion when a signal source moves between paths; an excellent total harmonic distortion (THD) specification that preserves audio and precision-signal integrity; and low ON-resistance matching and flatness, which minimize signal error across the input range. The device operates from a single 1.65V to 5.5V supply, compatible with 1.8V, 2.5V, 3.3V, and 5V logic systems. The switch core uses a low-charge-injection MOS transmission-gate architecture with approximately 8pF typical ON capacitance (per TI family data), limiting high-frequency insertion loss in data and RF routing paths. The digital IN pin is logic compatible across the full supply range, and the -Q1 suffix denotes AEC-Q100 qualification with -40C to +125C operation for automotive environments. Typical applications include automotive audio source selection, sensor-signal multiplexing in battery-management and body-control modules, UART/SPI/SMBus line sharing, and general-purpose signal gating in industrial systems. The 2.9mm x 1.6mm SOT-23-6 footprint suits densely populated boards. Design tip: terminate or AC-ground unused throw terminals to reduce crosstalk, and place the device close to the signal source to minimize parasitic trace capacitance. This page synthesizes distributor pricing, drop-in alternatives, comparison tables, and practical design notes not found in the manufacturer datasheet.

USD $0,28 En stock

TS5A63157

TS5A63157 - 10-Ohm SPDT Analog Switch 1.65-5.5V | TI

The Texas Instruments TS5A63157 is a single-pole, double-throw (SPDT) analog switch, also described as a 2:1 multiplexer/demultiplexer, designed to operate from a 1.65 V to 5.5 V supply. It handles both digital and analog signals with a low on-state resistance of approximately 10-12 ohms and comes in a 6-pin SC-70 (SOT, SC70-6, DCK) surface-mount package. An analog switch is a type of signal-routing IC in the broader family of multiplexers and switches within the semiconductor component hierarchy. Unlike a relay or mechanical switch, an analog switch uses CMOS transmission gates to route signals with low distortion, fast switching times, and no moving parts, making it fundamental to signal-chain design in portable and battery-powered systems. Key features include overshoot and undershoot voltage protection: the device senses voltage events at the I/Os and responds by preventing voltage differentials from developing and turning the switch on. It also provides isolation in powered-off mode (leakage specified at 0 when V+ = 0), break-before-make switching, 5-V tolerant control inputs, low charge injection, and excellent on-state resistance flatness. Technically, the TS5A63157 uses a CMOS switch architecture with integrated protection circuitry, allowing it to survive I/O faults that would damage unprotected switches. The powered-off isolation makes it ideal for hot-swap and battery-powered systems where rails may be sequenced or removed while signal lines remain connected. Typical applications include battery-powered portable devices, audio signal routing, hot-swap USB and peripheral switching, and multiplexing sensor or test signals in instrumentation. Priced at roughly $0.34 in single units as of 2026-08-30 per distributor data, it is also cost-effective for high-volume designs. Design tip: ensure the control input logic level is compatible with the V+ rail; control inputs are 5-V tolerant regardless of supply, and the break-before-make timing prevents momentary shorting of the two switch paths during transitions.

USD $0,16 En stock

TS7003ITD833

TS7003ITD833 - 12-Bit 300ksps SAR ADC, 2.5V Ref, TDFN-8 | Silicon Labs

The Silicon Labs TS7003ITD833 is a 12-bit, 300 ksps successive-approximation analog-to-digital converter (ADC) with a single-ended single-channel input, integrated +2.5V reference, and a high-speed serial digital interface, packaged in an 8-pin TDFN (3x3 mm) with exposed pad for thermal and ground integrity. Designed for single-supply operation from +2.7V to +3.6V, it draws less than 1 mA at full 300 ksps conversion rate. An ADC in this product category is a mixed-signal data converter that translates real-world analog voltages into discrete digital codes. The successive-approximation register (SAR) architecture family uses a binary-search algorithm with an internal track-and-hold front end, achieving a balance of speed, accuracy, and low power consumption suitable for embedded sensing, instrumentation, and process-control front-ends. This part sits within the broader hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. Its integrated reference removes an external component and reduces board area, an important benefit for compact sensor-interface designs. Key features include 12-bit resolution, 300 ksps throughput, a high-bandwidth input track-and-hold amplifier, and an internal +2.5V reference. The serial interface reduces pin count compared to parallel-output ADCs, simplifying routing and host-MCU connection. Low conversion-mode power consumption and an industrial temperature range support battery-aware and factory-floor deployments alike. The TS7003ITD833 successive-approximation architecture implements a charge-redistribution DAC internally, capturing input samples on the T/H at the rising edge of CNVST and presenting results one frame later through the SPI-compatible serial port. The integrated reference and single-supply rail minimizes external component count, while the 8-pin TDFN EP package provides a low-impedance thermal/ground path that enhances noise immunity at full throughput. Typical applications include industrial process-control analog front-ends, portable battery-powered data loggers, sensor-signal digitizers, weigh-scale and load-cell readouts, and microcontroller-based instrumentation. Use it where channel count is small, sampling rate is moderate, and PCB real estate is at a premium. When designing with this ADC, place the decoupling capacitor directly between AVDD and GND, keep analog and digital ground returns separated until they join at the exposed pad, and respect the tACQ acquisition-time timing parameter when writing firmware. Driving the analog input from a low-impedance buffer maintains data-sheet linearity at high source resistances. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet to help procurement and design engineers evaluate the TS7003ITD833 for new designs and second-source risk mitigation.

USD $1,49 En stock

TS7221BILT

TS7221BILT - Single BiCMOS R2R uPower Comparator | STMicroelectronics

The STMicroelectronics TS7221BILT is a single BiCMOS rail-to-rail micropower comparator housed in a 5-pin SOT-23 (SOT-23-5) package, designed for space- and weight-critical designs. It is fully specified at 2.7 V, 5 V and 10 V operation, drawing only a few microamperes of supply current while delivering rail-to-rail input performance and an open-drain output stage. The 'B' grade denotes a tighter input offset voltage grade versus the 'A' suffix variant, while the 'I' temperature suffix indicates the -40C to +85C industrial operating range and 'LT' indicates SOT-23-5 tape-and-reel packaging. A comparator is an analog building block that compares two input voltages and produces a logic-level output indicating which is larger. Micropower comparators like the TS7221 occupy a position in the power-management/analog signal-chain hierarchy below op-amps but above simple logic gates, and are favoured for always-on battery-powered designs where quiescent current dominates total energy consumption. Within ST's broader comparator family, the TS7221 sits alongside the TS7222 (dual) and TS7223 (quad) as the single-channel foundation of the series. Key features include rail-to-rail input common-mode range, an open-drain output that allows wired-OR logic and level-shifting to any pull-up voltage, very low supply current typically well under 10 uA, and 5 V/10 V operation suitable for industrial sensor interfaces. The BiCMOS process combines CMOS input stages with bipolar output drive for a balance of low power and reasonable switching speed. Internal ESD protection on the inputs (HBM 2000 V per the datasheet absolute maximum ratings) further improves robustness in handheld and field-deployed equipment. Typical applications include battery-pack voltage monitoring, threshold detectors, window comparators, and signal conditioning in IoT sensor nodes, wearables, and portable medical devices. The small SOT-23-5 footprint also makes the device attractive for space-constrained designs such as hearing aids and remote keyless-entry keyfobs. When designing with this part, choose the pull-up resistor on the open-drain output based on the desired propagation delay versus power budget; lower pull-up resistance speeds up edges but increases static current when the output is LOW.

USD $0,78 En stock

TS902ID

TS902ID - Dual Rail-to-Rail Op Amp with Standby | STMicroelectronics

The STMicroelectronics TS902ID is a dual rail-to-rail CMOS operational amplifier with a standby position, offering 1.4 MHz gain-bandwidth product, 10 mV offset voltage, and operation from single or dual supplies up to 16 V in a 14-pin SOIC package. The device is intended for instrumentation, industrial control, and signal-conditioning systems where low-power standby operation and rail-to-rail input and output behavior are useful. An operational amplifier is an analog integrated circuit that amplifies the voltage difference between its two inputs while using negative feedback to set the gain. The TS902ID belongs to the operational-amplifier hierarchy, where a dual amplifier provides two amplifier channels in one package. Rail-to-rail input and output stages allow signals to approach the supply rails, while the standby function reduces supply consumption and places the outputs in a high-impedance state. Key features include rail-to-rail input and output voltage ranges, a 1.4 MHz gain-bandwidth product, and 10 mV typical input offset voltage. The amplifier supports single- or dual-supply operation from 2.5 V to 16 V according to the available manufacturer information, and its standby current is specified at 0.5 uA. The 14-SO package supports conventional surface-mount assembly and exposes both amplifier channels and the standby control. The TS902ID uses a CMOS operational-amplifier architecture designed for general-purpose analog signal conditioning. Its low standby current supports portable and instrumented systems that need to reduce consumption when measurements are not active. Rail-to-rail operation is useful when the available signal range is close to the supply voltage, although input common-mode, output swing, noise, and stability conditions still need to be checked against the application. Typical applications include low-power instrumentation, industrial sensor interfaces, battery-operated measurement equipment, audio and control-signal conditioning, and dual-channel analog systems. The dual-channel configuration can reduce board area when two independent signal paths are required. The standby position is particularly appropriate for systems that periodically disable the amplifier while retaining the device in the circuit. When laying out a TS902ID design, keep the input and output paths short, provide stable feedback compensation, and bypass the supply pins with suitable ceramic capacitance. Do not assume that standby mode preserves signal accuracy at the moment of switching; verify the timing against the system requirements. The manufacturer datasheet should be used for the complete electrical limits, pin connections, and application recommendations. This page combines verified manufacturer and distributor references with practical engineering guidance for instrumentation, power-conscious analog design, and drop-in replacement assessment.

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TS912ID

TS912ID - Dual Rail-to-Rail CMOS Op Amp | STMicroelectronics

STMicroelectronics TS912ID is a dual rail-to-rail CMOS operational amplifier with two independent amplifiers, an 8-pin SOIC package, and operation from single or dual supplies. Verified distributor listings identify it as a 2.7 V to 16 V device with approximately 800 kHz gain-bandwidth product and 1.3 V/us slew rate. The rail-to-rail input and output architecture supports signal stages whose operating range approaches the available supply voltage. An operational amplifier is an analog building block that uses high open-loop gain to amplify voltage differences while feedback determines the closed-loop behavior. A dual op-amp combines two amplifiers in one package, allowing designers to implement filters, buffers, level conversions, or paired signal-conditioning stages while reducing board area. CMOS construction supports low-power and low-noise signal-chain designs across industrial, instrumentation, communications, and consumer equipment. The TS912ID's rail-to-rail input range includes both supply rails, while its rail-to-rail output can swing close to the upper and lower limits. The verified 800 kHz bandwidth provides useful response for general-purpose low-frequency and moderate-frequency applications, while the 1.3 V/us slew rate supports faster transitions than very low-bandwidth precision amplifiers. Two independent, frequency-compensated amplifiers are contained in the same 8-SOIC package. Supply flexibility is central to the device: it can operate from a single 2.7 V minimum supply or from dual positive and negative rails. This makes it suitable for battery-powered instrumentation, active filtering, transducer interfaces, and general analog signal conditioning. Designers should still verify input and output common-mode limits, output-load behavior, noise, input-bias-current requirements, and stability against the conditions of the manufacturer datasheet. Typical uses include low-frequency active filters, sensor-signal conditioning, audio and communications interface blocks, voltage buffering, and two-channel sensor amplification. The SOIC-8 package is straightforward for conventional PCB assembly and breadboard or prototype layouts, although exposed-pad thermal management is not applicable. The primary design consideration is to place input, feedback, and decoupling components so that high-gain layouts remain stable. Keep sensitive input traces short, maintain a low-impedance ground reference, and follow the datasheet's recommended bypass capacitance. Verify the actual output swing against the load and required logic or sensor levels rather than assuming ideal rail-to-rail behavior. This page combines verified distributor pricing, manufacturer datasheet access, same-package replacement data, and practical selection guidance. It separates explicitly published facts from parameters requiring design verification, helping engineers source TS912ID without relying on generic amplifier descriptions.

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TS931BILT

TS931BILT - 100kHz Rail-to-Rail Micropower Op Amp | STMicroelectronics

The STMicroelectronics TS931BILT is a single-channel CMOS operational amplifier in a SOT-23-5 package, featuring rail-to-rail output swing, micropower consumption, and operation down to 2.7 V single supply. As a member of the TS93x family (single/dual/quad variants), it delivers 100 kHz gain-bandwidth product while drawing only a few microamps of quiescent current, making it an excellent choice for battery-powered and portable applications. An operational amplifier (op-amp) is a high-gain DC-coupled electronic voltage amplifier with differential inputs and, typically, a single-ended output. Within the broader signal-conditioning hierarchy, op-amps sit between transducers/ADC front ends and downstream digital processing; rail-to-rail output variants extend the usable output swing to nearly both supply rails, maximizing dynamic range in low-voltage systems. Micropower CMOS op-amps like the TS931BILT optimize this topology for low-Iq operation, trading GBW and slew rate for extended battery life in handheld, IoT, and remote-sensor designs. Key specifications include a 2.7 V to 10 V supply range, 100 kHz GBW, rail-to-rail output (reaching 2.9 Vpp with RL = 100 kΩ at 3 V supply), CMOS input stage, and an operating temperature range of -40 °C to +105 °C. The SOT-23-5 package is among the smallest standard op-amp footprints, enabling compact PCB layouts in space-constrained designs. Architecturally, the TS931BILT uses a CMOS input stage with a class-AB output stage to deliver rail-to-rail output swing at low quiescent current. The 'B' suffix denotes the enhanced second-generation variant, offering improved offset and noise compared with the original TS931, while the 'I' in 'ILT' indicates the industrial temperature grade (-40 °C to +105 °C). Typical applications include battery-powered instrumentation, portable medical devices, sensor signal conditioning, active filters, and transducer interfaces. The micropower Iq makes it ideal for always-on circuits where sleep current must be minimized. When designing with this op-amp, note that the CMOS inputs have lower bias current than bipolar alternatives but may exhibit higher leakage at elevated temperatures. Decouple the supply with a 100 nF ceramic capacitor placed close to the VCC pin to suppress noise. This page synthesizes distributor pricing, drop-in alternatives within the same SOT-23-5 footprint, and practical design notes that go beyond the manufacturer datasheet, helping engineers select the right op-amp quickly.

USD $0,58 En stock

TS944IPT

TS944IPT - Quad Rail-to-Rail 1.2µA Op-Amp | STMicroelectronics

The STMicroelectronics TS944IPT is a quad CMOS-input operational amplifier delivering rail-to-rail output swing while consuming only 1.2 µA typical quiescent current per channel, packaged in a 14-pin TSSOP (Tape & Reel). It operates from a single 2.5 V to 10 V supply over the -40 °C to +85 °C industrial temperature range and provides a gain-bandwidth product of 10 kHz, making it ideal for ultra-low-power signal conditioning. An operational amplifier (op-amp) is a high-gain DC-coupled differential amplifier that uses external feedback components to set closed-loop gain, bandwidth, and transfer function. The TS944 belongs to the micropower CMOS op-amp family — a class of linear ICs that prioritize nano- to micro-amp quiescent current draw for battery-powered and energy-harvesting designs. Within the broader semiconductor hierarchy, it sits under: op-amp -> amplifier -> analog IC -> linear IC -> integrated circuit. Key features include four independent op-amp channels in one package, CMOS inputs delivering ultra-low input bias current, rail-to-rail output swing that maximizes dynamic range on low-voltage supplies, and 1.2 µA typical supply current per amplifier that enables years of runtime from small cells. The device is unity-gain stable and supports single-supply operation from 2.5 V to 10 V, simplifying designs that previously needed bipolar ±5 V rails. The TS944 architecture uses a CMOS input stage that achieves very low bias current while the class-AB output stage swings to within millivolts of both supply rails. This combination eliminates the need for input bias-current compensation in high-impedance sensor interfaces and lets designers operate the part directly from a single lithium cell or 3.3 V digital rail without sacrificing headroom. Typical applications include battery-powered sensor signal conditioning, portable medical monitors, IoT edge nodes, active filters, transducer pre-amplifiers, and any micropower analog front end where four amplifiers must fit in a small 14-pin TSSOP footprint. Designers should bypass supplies with 100 nF ceramic capacitors placed within 5 mm of VCC and avoid capacitive loads above 1 nF without an isolation resistor to prevent oscillation.

USD $0,92 En stock

TSA1005-40IFT

TSA1005-40IFT - 10-Bit 40MSPS Dual ADC | STMicroelectronics

The STMicroelectronics TSA1005-40IFT is a dual-channel, 10-bit resolution analog-to-digital converter (ADC) based on a pipelined architecture, sampling up to 40 MSPS in a 48-pin TQFP (7x7 mm) package. It uses a 0.25 µm deep sub-micron CMOS process, operates from a single 2.5 V analog supply, and supports an independent 2.5 V or 3.3 V CMOS output supply. A pipelined ADC is a high-speed converter architecture that resolves an analog input across multiple cascaded low-resolution stages, each driving a sample-and-hold amplifier and a flash sub-ADC. The pipeline allows new conversions to begin every clock cycle, achieving sample rates well above 100 MSPS while keeping per-stage hardware compact. Pipelined ADCs sit within the broader taxonomy: data converter -> ADC -> high-speed ADC -> pipelined ADC -> integrated circuit -> semiconductor. The TSA1005 belongs to a category often called "baseband IF sampling ADCs," used when analog signals need to be digitized near the antenna or sensor for downstream DSP. Key specifications include 1 GHz analog input bandwidth, an integrated track-and-hold amplifier per channel, common clocking for synchronous dual-channel sampling, and a multiplexed digital output mode. The device targets applications needing a low noise floor and high SFDR; SFDR (Spurious-Free Dynamic Range) measures how far the largest spurious tone sits below the fundamental when digitizing a pure sine wave, with higher values meaning cleaner spectra. The TSA1005 is engineered for very low noise floor, high SFDR, and good channel-to-channel isolation. Typical applications include medical ultrasound imaging, professional video processing, IF (intermediate frequency) sampling for communications receivers, instrumentation, and industrial non-destructive testing. Each application relies on the part's combination of 10-bit resolution at video-grade sample rates and dual-channel synchronous capture. When designing with this part, decouple both the 2.5 V analog and 2.5/3.3 V digital rails with 100 nF ceramic capacitors placed as close as possible to each supply pin. Route the analog inputs as 50 Ω controlled-impedance traces with the analog ground plane isolated from the digital return to minimize coupling. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical PCB layout notes not found in the manufacturer datasheet alone. Information current as of 2026-10-15.

USD $10,25 En stock

TSA1203IF

TSA1203IF - Dual 12-bit 40MSPS ADC | STMicroelectronics

The STMicroelectronics TSA1203IF is a dual-channel, 12-bit, 40 MSPS analog-to-digital converter fabricated in a mainstream 0.25 µm CMOS process, housed in a 48-pin TQFP (7x7 mm) package. It integrates two simultaneous sample-and-hold amplifiers, a 1 GHz analog input bandwidth, and a built-in reference voltage, dissipating 230 mW at 40 Msps from a single 2.5 V supply. The CMOS output stage can be driven from an independent 2.5 V or 3.3 V rail, simplifying interfacing to both legacy and modern FPGA/ASIC logic families. An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that converts a continuous-time, continuous-amplitude analog input into a discrete-time, discrete-amplitude digital code. Pipeline ADCs such as the TSA1203IF use a multi-stage switched-capacitor architecture to achieve high sampling rates while keeping per-stage power and die area modest, sitting within the broader hierarchy of data converters -> ADC -> high-speed pipeline ADC -> semiconductor. Dual-channel variants like this one are favored for diversity receivers, I/Q baseband sampling, and simultaneous multi-antenna digital beamforming because the two channels are sampled on a common clock edge, eliminating channel-to-channel skew. Key features include 1 GHz analog input bandwidth, SFDR of -68.3 dBc at 10 MHz input, multiplexed outputs for reduced pin count, common clocking between channels, and pin-to-pin compatibility with the dual 10-bit 20/40 MSPS TSA1005-20/40 and the dual 12-bit 20 MSPS TSA1204. The pipelined architecture combined with digital error correction yields clean 12-bit outputs at full clock rate without requiring complex external calibration at room temperature. Typical applications include cellular base station receivers, IF sampling for software-defined radio, medical imaging front-ends, and industrial ultrasound beamformers. The integrated reference and dual independent input channels also suit multi-channel data-acquisition cards for test and measurement instrumentation. When designing with this part, ensure the analog and digital grounds are joined only at a single point near the exposed pad, and that the analog supply is decoupled with both 0.1 µF ceramic and 10 µF bulk capacitance within 5 mm of the supply pins.

USD $8,20 En stock

TSA1204IFT

TSA1204IFT - 12-Bit 20MSPS Dual-Channel ADC | STMicroelectronics

The STMicroelectronics TSA1204IFT is a 12-bit resolution, dual-channel pipelined Analog-to-Digital Converter sampling up to 20 MSPS, packaged in a 48-pin TQFP (7x7 mm). The device operates from a single 2.5 V analog supply with an independent 2.5 V/3.3 V CMOS output stage supply, consuming only 95 mW per channel at 20 MSPS and scaling down adaptively at lower sampling rates. An Analog-to-Digital Converter (ADC) is a mixed-signal integrated circuit that converts continuous-time analog voltages into discrete digital codes at a specified sampling rate. Dual-channel pipelined ADCs belong to the broader hierarchy of data converter IC -> mixed-signal IC -> semiconductor, and they occupy the performance tier between successive-approximation (SAR) converters (slow, low-power, <5 MSPS) and high-speed flash converters (very fast, very high power). The TSA1204IFT targets moderate-bandwidth multi-channel systems where engineers need two synchronized channels without the cost of two discrete ADCs. Key features include a 1 GHz analog input bandwidth, an integrated Track-and-Hold amplifier, 11.2-bit effective number of bits (ENOB) at the Nyquist input frequency, and -81.5 dBc spurious-free dynamic range (SFDR) at Nyquist. The 0.25 micrometer CMOS process enables adaptive power consumption scaling from 0.5 MSPS to 20 MSPS, allowing the part to drop to lower power in standby. The CMOS outputs are pin-selectable between 2.5 V and 3.3 V logic levels, simplifying interface to FPGAs, ASICs, or microcontrollers in mixed-voltage systems. Typical applications include dual-channel digital oscilloscopes, intermediate-frequency (IF) signal processing in communications receivers, ultrasound imaging front-ends, and high-speed industrial data acquisition. The dual channel allows simultaneous sampling of in-phase and quadrature (I/Q) baseband signals, or two channels of a multi-channel instrumentation system. When designing with the TSA1204IFT, place the analog and digital ground returns on a split ground plane joined under the ADC, use wide PCB traces for the analog supply pins, and decouple each supply pin with 100 nF and 10 uF capacitors placed as close as possible to the device. The exposed pad of the TQFP should be soldered to a ground plane for thermal and electrical performance. This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not collected in any single manufacturer datasheet revision, giving engineers a one-stop reference for sourcing and second-sourcing the TSA1204IFT.

USD $5,40 En stock

TSA1401IF

TSA1401IF - 14-bit 20MSPS 85mW ADC | STMicroelectronics

The STMicroelectronics TSA1401IF is a 14-bit, 20 MSPS pipelined analog-to-digital converter that consumes only 85 mW at full sampling rate. Housed in a 48-pin TQFP (7x7 mm) package, the part targets low-power imaging and instrumentation applications where conventional 14-bit ADCs exceed the system thermal budget. According to the STMicroelectronics datasheet, the TSA1401IF implements ST's OPTIMWATT architecture to dynamically scale internal bias currents with clock rate, enabling designers to lower the sampling clock for slower channels and reduce overall system power. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that quantizes a continuous-time analog input into a discrete N-bit binary code at a programmable sample rate. TSA1401IF sits in the high-speed, mid-resolution segment of the ADC taxonomy (ADC -> pipelined ADC -> high-speed ADC -> data converter -> mixed-signal IC). Pipelined ADCs use multiple low-resolution flash stages interleaved with residue gain and digital correction to achieve both high conversion rate and moderate resolution; this architecture dominates the 10-100 MSPS / 10-14 bit space used in CCD imaging, ultrasound front ends, and digital oscilloscope channels. Key specifications include 14-bit resolution, 20 MSPS maximum sample rate, 85 mW typical power dissipation at full speed, single 5 V analog supply, single +3 V to +5 V digital supply, 48-pin TQFP (7x7 mm) package, industrial temperature range (-40 C to +85 C), and an external reference input. The pipelined converter includes self-calibrated digital error correction that typically holds DNL within 0.5 LSB and INL within 1.0 LSB across the industrial temperature range. Differential analog inputs are AC-coupled through on-chip clamp protection, supporting full-scale ranges from 1 Vp-p to 2 Vp-p driven by op-amp or transformer front ends. Typical applications include high-end infrared imaging for surveillance and thermography, X-ray medical imaging front ends, professional CCD camera front ends for broadcast and industrial vision, document scanners and digital copiers, and test instrumentation including digital storage oscilloscopes and arbitrary waveform recorders. Designers value the TSA1401IF in battery-powered portable imaging systems where total BOM power directly limits field runtime. When designing with the TSA1401IF, the analog input must be driven from a low-impedance differential source; designers typically use a transformer (for single-ended to differential conversion) or a fully-differential op-amp such as the THS4503. Decoupling must include 10 uF tantalum plus 100 nF ceramic on each supply pin, placed within 5 mm of the package. The clock line should be routed with 50 ohm controlled impedance and kept away from analog signal traces. This page synthesizes distributor pricing, identical-footprint drop-in alternatives from the same STMicroelectronics family, and practical layout notes that complement the official datasheet.

USD $10,95 En stock

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