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Productos (32725)

TSA7887ARMZ - 12-Bit 125ksps 2-Ch SAR ADC | Silicon Labs
TSA7887ARMZ

TSA7887ARMZ - 12-Bit 125ksps 2-Ch SAR ADC | Silicon Labs

The Silicon Labs TSA7887ARMZ is a 12-bit, 125 ksps, 2-channel successive-approximation register (SAR) analog-to-digital converter with a serial SPI/QSPI/MICROWIRE-compatible output, an internal 2.5V reference, and an 8-pin MSOP package. Originally developed by Touchstone Semiconductor (later acquired and second-sourced by Silicon Labs), the device operates from a 2.7V to 5.25V analog supply and is targeted at low-power instrumentation that demands sub-microamp standby current and 12-bit true conversion precision. An SAR ADC (successive-approximation-register analog-to-digital converter) is a type of data converter that uses a binary-search algorithm against an internal capacitive DAC to resolve an analog input one bit per conversion clock cycle. It belongs to the broad family of analog-to-digital converters (ADCs), which itself is part of the data-converter hierarchy inside mixed-signal and signal-chain integrated circuits. The SAR architecture is favored over delta-sigma and pipeline ADCs when low-latency deterministic conversion, small package size, and moderate sample rates (tens to hundreds of ksps) are required, particularly in multiplexed multi-channel systems. Key features of the TSA7887ARMZ include an internal 2.5V reference (selectable externally via the REF pin), a 2-channel analog input multiplexer, true 12-bit performance with no missing codes, a 125 ksps maximum throughput, low power dissipation (typically under 2.5 mW at 3V/100 ksps), and automatic power-down between conversions that drops supply current below 1 microampere. The device uses an external clock for the serial interface and supports both unipolar single-ended and pseudo-differential input configurations. The device leverages a charge-redistribution SAR core with input transient suppression and an automatic input common-mode settling window, which makes it tolerant of source-impedance variations when channels are switched. Combined with the internal precision reference, this means the TSA7887ARMZ can replace an external ADC + reference + op-amp buffer chain in many space-constrained designs. Typical applications include portable and battery-powered data loggers, industrial process-control sensor front-ends (thermocouple, RTD, strain-gauge bridges), handheld instrumentation, and multiplexed 4-20 mA loop monitors. Designers also use it in optical sensor modules and consumer battery chargers where periodic current/voltage telemetry is required. When designing with this part, size the input RC network and reference bypass capacitors per the datasheet's application circuit - inadequate decoupling is the most common cause of last-2-LSB noise and gain drift in SAR circuits. Consider the MAX1276CTC+ from Maxim's family as a drop-in 8-pin MSOP alternative if higher conversion speed is needed. This page synthesizes distributor pricing, drop-in MSOP-8 alternatives, and practical design notes not found in the manufacturer datasheet alone.

USD $3,10 En stock
TSA7887ARMZ-REEL - 12-bit 125ksps 2-ch SAR ADC | Silicon Labs
TSA7887ARMZ-REEL

TSA7887ARMZ-REEL - 12-bit 125ksps 2-ch SAR ADC | Silicon Labs

The Silicon Labs TSA7887ARMZ-REEL is a 12-bit, 125 ksps, 2-channel successive-approximation-register (SAR) analog-to-digital converter housed in an 8-pin MSOP package with a single +2.7V to +5.25V supply. The 'RMZ' suffix indicates the MSOP-8 (RM) tape-and-reel (REEL) packaging variant. Originally designed by Touchstone Semiconductor as a pin-compatible second source for the ADI AD7887, the part features an internal +2.5V reference, internal wideband track-and-hold, and serial I/O compatible with SPI, MICROWIRE, QSPI, and DSP ports. Typical supply current is 0.85 mA at full throughput, qualifying the part as a micropower converter for battery and loop-powered systems. A SAR ADC is a successive-approximation-register analog-to-digital converter, a converter topology that uses a binary-search algorithm and a capacitive charge-redistribution DAC to resolve each conversion in N clock cycles for an N-bit result. SAR converters sit in the data-converter hierarchy between flash converters (fastest, lowest resolution) and sigma-delta converters (highest resolution, slowest). They are valued for deterministic latency, low power consumption, and the ability to drive them directly from a microcontroller or DSP serial port without an external reference or high-speed clock. Key features include a 500 ns input track-and-hold acquisition time, an internal +2.5V reference that eliminates external reference components, and a single-ended analog input structure that supports one or two channels multiplexed to the ADC core. Throughput scales with the external serial clock up to 125 ksps at 2 MHz SCLK. The wide supply range allows direct interfacing to 3.3V and 5V microcontrollers, while the small MSOP-8 footprint suits space-constrained sensor readouts and portable instrumentation. Typical applications include transducer and sensor signal conditioning, battery-powered data loggers, industrial process control loops with 4-20 mA interfaces, and portable medical or instrumentation front-ends. The combination of low power, internal reference, and small footprint also suits loop-powered 4-20 mA smart transmitters where every milliwatt and square millimeter matters. When designing with this device, ensure the analog input stays within the input common-mode range specified by the supply, and add a small RC anti-alias filter on each input to limit out-of-band noise folding into the conversion result.

USD $2,55 En stock
TSA7887ARZ - 12-bit 125ksps 2-ch SAR ADC | Silicon Labs SOIC-8
TSA7887ARZ

TSA7887ARZ - 12-bit 125ksps 2-ch SAR ADC | Silicon Labs SOIC-8

The Silicon Labs TSA7887ARZ is a micropower, 2-channel, 125-ksps, serial-output 12-bit successive-approximation analog-to-digital converter housed in an 8-pin SOIC (RZ) package. It integrates a precision 2.5V internal reference, supports a single 2.7V to 5.25V analog supply, and consumes only 3.2 mW at 125 ksps with full power-down modes reducing quiescent current to sub-microamp levels. The part accepts true bipolar input ranges via flexible reference configuration. An ADC (analog-to-digital converter) is a data-acquisition integrated circuit that samples continuous analog voltages and converts each sample into a discrete digital code for processing by a microcontroller, DSP, or FPGA. Successive-approximation-register (SAR) ADCs use a binary-search algorithm against a precision DAC and reference to resolve one bit per clock cycle, achieving a deterministic conversion time of N cycles for N-bit resolution. This conversion topology sits in the broader hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. SAR ADCs are prized for low latency, deterministic behavior, and absence of pipeline-latency artifacts. Key features include 12-bit resolution with no missing codes, an integrated 2.5V reference, an SPI-/QSPI-/MICROWIRE-compatible serial interface, true-differential analog inputs, software-configurable unipolar/bipolar input ranges, and a hardware-power-down pin. The internal reference can be overdriven with an external source, simplifying ratiometric measurements such as bridge-sensor readings. An on-chip oscillator eliminates the need for an external clock source in cost-sensitive designs. Architecturally, the TSA7887ARZ uses a charge-balancing switched-capacitor DAC front end that converts the input voltage into a digital code across 12 SAR clock cycles. The auto-calibration cycle corrects offset and gain errors on every conversion, eliminating drift across temperature and supply variations. Serial data is clocked out MSB-first and conforms to standard SPI modes, allowing direct connection to most modern microcontrollers without glue logic. Typical applications include portable instrumentation, battery-powered data loggers, industrial process-control loops, sensor conditioning modules, and panel-meter front ends. The low power draw makes it particularly attractive for solar- or energy-harvesting systems where average current budget is critical. The integrated reference and 2-channel mux further reduce total BOM and PCB area in compact designs. When designing with this part, ensure the analog supply is decoupled with a 1uF ceramic plus a 10uF bulk capacitor placed within 5 mm of the AVDD pin. Reference-pin decoupling is equally critical - a 0.1uF ceramic directly across REF should be used. Avoid switching digital traces under the analog front end to preserve SNR. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

USD $1,85 En stock
TSA7887ARZ-REEL - 12-bit 125ksps 2-ch SAR ADC SOIC-8 | Silicon Labs
TSA7887ARZ-REEL

TSA7887ARZ-REEL - 12-bit 125ksps 2-ch SAR ADC SOIC-8 | Silicon Labs

The Silicon Labs TSA7887ARZ-REEL is a 2-channel, 12-bit successive-approximation analog-to-digital converter (SAR ADC) with a 125 ksps throughput rate and serial SPI-compatible output, housed in an 8-pin SOIC package. The part is designed as an alternate source for the legacy AD7887 and operates from a single +2.7 V to +5.25 V supply while drawing only 0.85 mA typical supply current, supporting micropower applications. An integrated 2.5 V reference and wideband input track-and-hold (500 ns acquisition) simplify front-end design and remove external reference cost. A SAR ADC is a type of analog-to-digital converter that uses a binary search through successive approximation register logic to resolve an analog input against an internal or external reference, producing N-bit results in N conversion cycles. SAR ADCs excel at medium-to-high resolution (12-18 bit) sampling at moderate speeds (10 ksps to 10 Msps) without the pipeline latency of higher-speed flash or pipelined architectures, making them ideal for multiplexed multi-channel data acquisition systems. Within the data-converter hierarchy, the TSA7887ARZ-REEL sits as a precision ADC -> data converter -> signal chain IC -> mixed-signal semiconductor, combining analog input conditioning, reference generation, and digital serial interface on a single die. Key features include a 125 ksps maximum sampling rate, two single-ended analog input channels multiplexed into one ADC core, an internal 2.5 V reference, a low 0.85 mA supply current, a wide input bandwidth track-and-hold (500 ns), and a serial interface compatible with SPI/QSPI/MICROWIRE. The device accepts bipolar-input-capable front end via simple resistor networks and provides an external reference option when system-level drift compensation is required. The 8-pin SOIC footprint supports standard surface-mount assembly flows. Architecturally, the TSA7887ARZ-REEL uses a charge-redistribution DAC array with successive-approximation register logic clocked from an external serial clock up to 2 MHz. The wideband track-and-hold preserves signal fidelity above the Nyquist limit of the 125 ksps sampling rate, while the integrated reference and input MUX eliminate the external analog conditioning typically required for discrete ADC designs. The serial output reduces pin count versus parallel-output ADCs and simplifies galvanic isolation in industrial systems. Typical applications include portable battery-powered instrumentation, industrial process-control loop monitoring, multi-channel data-logger front ends, sensor-signal conditioning for strain-gauge and thermocouple inputs, and touch-screen / resistive-position decoder interfaces. The low 0.85 mA supply current also suits remote or solar-powered sensor nodes. Where higher throughput is needed, the part's SPI-compatible daisy-chain capability lets two devices share a single serial port. When designing with this device, drive the analog inputs from low-impedance buffers (<= 50 ohm source impedance) to avoid conversion errors caused by the kick-back charge of the internal CDAC array. Bypass VDD with a 0.1 uF ceramic plus 10 uF tantalum placed within 5 mm of the supply pin, and provide a clean analog ground return to keep the integrated reference stable. The throughput scales linearly with external SCLK; a 2 MHz SCLK yields the rated 125 ksps. Note that the TSA7887ARZ-REEL is currently listed as obsolete by Silicon Labs (last-time-buy status), so long-life designs should consider the newer AD7887SRZ-EP equivalent. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

USD $2,48 En stock
TSA7887BRZ - 12-bit 125kSPS 2-Ch SAR ADC | Silicon Labs
TSA7887BRZ

TSA7887BRZ - 12-bit 125kSPS 2-Ch SAR ADC | Silicon Labs

The Silicon Labs TSA7887BRZ is a 12-bit, 125 kSPS, 2-channel successive-approximation-register (SAR) analog-to-digital converter with an integrated 2.5 V internal reference, housed in an 8-pin SOIC package. It operates from a single 2.7 V to 5.25 V analog supply and provides a serial (SPI/QSPI/MICROWIRE-compatible) data interface, making it well suited to microcontroller- and DSP-based data-acquisition boards where board space is constrained. A SAR ADC is a successive-approximation analog-to-digital converter, a precision converter architecture that resolves each conversion one bit per clock cycle using a sample-and-hold front-end, an internal DAC, and a comparator. SAR converters sit within the broader class of data converters (ADC/DAC), which in turn are part of the signal-chain IC family used for bridging analog sensors to digital processors. Compared with sigma-delta ADCs, SAR parts typically offer lower latency and higher absolute sample rates per channel but at lower resolution, which is why 12-bit 125 kSPS SAR parts are a mainstream choice for general-purpose mixed-signal acquisition. Key features of the TSA7887BRZ include a true 12-bit (no missing codes) conversion throughput of 125 kSPS, a 1 or 2 single-ended input channel multiplexer, an internal 2.5 V reference with low drift, a wide 2.7 V to 5.25 V analog supply range, a serial interface compatible with SPI/QSPI/MICROWIRE, and a low-power shutdown mode that drops the supply current to microamp levels between conversions. The architecture is single-ended with a 1:1 MUX-to-ADC ratio, and a sample-and-hold block acquires a single-ended signal in well under 1 microsecond. Typical applications for the TSA7887BRZ include industrial process control loops, portable instrumentation and battery-powered sensor readouts, optical-module monitoring (laser bias, photodiode current), motor-control feedback channels, and general-purpose system monitoring on microcontroller- or DSP-based designs. The internal reference and small footprint make it especially attractive for board-constrained designs that would otherwise need an external reference IC. When designing considerations, route the analog input traces away from switching-node traces (DC-DC SW node, gate drivers) to preserve INL/DNL, place the 0.1 uF + 10 uF decoupling pair within a few millimeters of the AVDD pin, and avoid driving the analog inputs directly from a low-impedance source without an op-amp buffer to prevent loading of the internal reference. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that are not found on the manufacturer product page, giving engineers a single decision-ready reference.

USD $1,85 En stock
TSA7887BRZ-REEL - 12-Bit 125kSPS 2-CH SAR ADC | Silicon Labs
TSA7887BRZ-REEL

TSA7887BRZ-REEL - 12-Bit 125kSPS 2-CH SAR ADC | Silicon Labs

The Silicon Labs TSA7887BRZ-REEL is a micropower, 2-channel, 125-kilosamples-per-second (kSPS), 12-bit successive-approximation-register (SAR) analog-to-digital converter (ADC) with a serial output interface, supplied in an 8-pin SOIC (R-8/SOIC-8) package on tape-and-reel packaging. It operates from a single 2.7 V to 5.25 V supply and integrates a wide-bandwidth track-and-hold, an internal +2.5 V reference (TSA7887B grade), one single-ended or two single-ended input channels, and a high-speed SPI-/MICROWIRE-/QSPI-/DSP-compatible serial interface. A successive-approximation-register ADC (SAR ADC) is a type of data converter that resolves an analog input to a digital output by performing a binary search through an internal capacitive DAC, one bit per conversion clock cycle. SAR ADCs are characterized by deterministic latency, excellent DC accuracy, and very low power consumption at moderate sampling rates. Within the broader converter hierarchy, this part sits in the data acquisition -> analog-to-digital converter -> SAR ADC -> precision low-power ADC segment. Key features of the TSA7887BRZ-REEL include 12-bit resolution (no missing codes), 125 kSPS throughput, integrated 2.5 V reference, single-supply 2.7 V to 5.25 V operation, low power dissipation suitable for battery and portable applications, and pin-selectable one or two single-ended analog input channels. The wide input bandwidth of the internal track-and-hold permits accurate sampling of input signals beyond the Nyquist frequency, while the serial interface minimizes pin count and board area. Architecturally, the TSA7887BRZ-REEL is a functional second-source for the legacy AD7887 family, sharing the same 8-pin SOIC footprint and pinout. The internal reference (2.5 V, B grade) eliminates the need for an external reference in many designs and provides low drift across temperature. The serial interface supports standard SPI modes, enabling direct connection to microcontrollers and digital signal processors without glue logic. Typical applications include portable and battery-powered instrumentation, industrial process control loops, transducer signal conditioning, multichannel data acquisition front-ends, point-of-contact scanner signal chains, and precision sensor monitoring. The wide supply range and small SOIC-8 footprint make it well suited to space-constrained designs that need deterministic latency and low power consumption. When designing with this part, place the 0.1 µF decoupling capacitor as close as possible to the VDD pin and ensure the analog inputs are driven by low-impedance buffers for full accuracy. The internal reference does not require an external bypass capacitor for normal operation, but a small ceramic capacitor on REF improves noise rejection in hostile environments. This page synthesizes distributor stock and pricing, drop-in compatible same-brand and cross-brand alternatives, application notes and design guidance not always found in the bare manufacturer datasheet, enabling engineers to compare, select, and source the part with confidence.

USD $2,40 En stock
TSB011 - Data Unverified, No Confirmed Electronic Component Found
TSB011

TSB011 - Data Unverified, No Confirmed Electronic Component Found

The MPN TSB011 could not be confirmed as a specific electronic component from the verified web data retrieved for this query. Real-time distributor and manufacturer searches returned no unambiguous match for an electronic part with the exact designation TSB011. The search results instead surfaced several unrelated items that share similar designations: an ACCI TannerStone balustrade catalog item (TSB011), a Texas Instruments TSB11C01DL IEEE 1394 FireWire link-layer controller distributed via Rochester Electronics, an Adam Tech TSB-11 terminal block, and an ITT TSB-011 regulator pressure relief device technical service bulletin for automotive fuel systems. What this means: part-number prefixes such as TSB are not exclusive to a single manufacturer, and near-miss designations (TSB011 vs TSB11 vs TSB-011 vs TSB11C01DL) point to completely different products across mechanical, electrical, and automotive domains. Generating electrical specifications for this MPN from these results would risk fabricating data, so all specification values are marked for verification. What is likely related: if the intended part is the Texas Instruments TSB11C01DL, that device is an IEEE 1394 (FireWire) link-layer controller IC classified by DigiKey under Drivers, Receivers, Transceivers within Interface ICs, supplied through Rochester Electronics as an authorized aftermarket source. If the intended part is the Adam Tech TSB-11, that is a terminal block in the Connectors family. Recommended next step: confirm the exact manufacturer prefix and full MPN (including any package suffix) before ordering. This page will be updated once verified datasheet data is available.

Cotización En stock
TSI384-133ILV - PCIe to PCI-X Bridge 256-BGA | Renesas Electronics
TSI384-133ILV

TSI384-133ILV - PCIe to PCI-X Bridge 256-BGA | Renesas Electronics

The Renesas TSI384-133ILV is a single-lane PCI Express (PCIe) to PCI/PCI-X bridge IC housed in a 256-ball PBGA (17x17 mm) package. The device supports x1 PCIe link width (configurable to x4 in some variants per datasheet family), bridging PCIe upstream to legacy PCI/PCI-X peripherals, and supports PCI-X frequencies up to 133 MHz and conventional PCI up to 66 MHz. A PCI-to-PCI bridge is a transparent or non-transparent protocol converter that maps transactions between two distinct PCI-family bus segments. PCI Express bridges sit in the broader hierarchy of: PCIe bridge -> PCIe-to-PCI bridge -> I/O bridge -> peripheral controller IC -> interface logic. Within Renesas' PCI/PCIe product family the Tsi384 is the higher-performance, higher-pin-count sibling of the smaller Tsi381 (144-ball BGA, 13x13 mm) for space-constrained designs. Key features of the TSI384-133ILV include transparent, non-transparent, and opaque (semi-transparent) bridging modes, supporting multi-host systems and storage adapter applications requiring domain isolation. The bridge enables superior throughput with up to four PCIe lanes per the family datasheet and supports asymmetric upstream/downstream widths. Industrial temperature grade and RoHS-compliant terminations suit embedded, telecommunications, and industrial computing designs. Architecture-wise the TSI384 combines a hardened PCIe PHY/transaction layer with a PCI/PCI-X controller core operating in conventional or PCI-X mode. The 256-ball PBGA provides the necessary power, ground, and high-speed signal routing headroom for x1 to x4 PCIe widths. Operating supply voltage is 1.2 V core plus I/O rails, supplied via multiple pins. Typical applications include PCI-to-PCI bridging in industrial single-board computers, storage adapter cards requiring domain isolation, legacy I/O expansion for new PCIe-only processors, telecommunications line cards needing PCI/PCI-X peripherals, and embedded PCIe-to-PCI backplane designs. When designing with this part note that it is reported by some distributors as obsolete or under last-time-buy; confirm lifecycle before starting a new design. Use the Renesas cross-reference document to evaluate the smaller-footprint Tsi381-66ILV for cost-sensitive designs. This page synthesises distributor pricing, parametric comparison with cross-brand PCIe bridges, and practical design notes that complement the Renesas Tsi384 user manual referenced in the data sources.

USD $17,80 En stock
TSM1285BCSA+ - 12-Bit 300ksps SAR ADC | Silicon Labs
TSM1285BCSA+

TSM1285BCSA+ - 12-Bit 300ksps SAR ADC | Silicon Labs

The Silicon Labs TSM1285BCSA+ is a 12-bit, 300 ksps, single-supply, low-power successive-approximation analog-to-digital converter (ADC) housed in an 8-pin SOIC package. It integrates an internal 2.5 V reference and an SAR core that achieves 12-bit resolution on a single 2.7 V to 3.6 V analog/digital supply. The device is specified across the commercial temperature range -40C to +85C and is sourced from the legacy Touchstone Semiconductor line now carried under the Silicon Labs brand. An SAR (Successive Approximation Register) ADC is a type of data converter that uses a binary-search algorithm against an internal DAC to digitize an analog input in N conversion clock cycles. SAR ADCs sit in the data converter hierarchy between flash converters (fast, expensive, low resolution) and sigma-delta converters (high resolution, slow, dense digital filtering). Because SAR ADCs require no continuous-time oversampling, they are well suited to multiplexed multi-channel acquisition systems, instrumentation loops, and embedded sensor readouts where deterministic latency matters more than extreme dynamic range. Key features include 300 ksps sampling rate, single 2.7 V to 3.6 V supply operation, internal 2.5 V reference, low power consumption, and a serial interface. The serial output simplifies isolation between the analog front end and a digital host MCU or FPGA, reducing board-level pin count compared with parallel-output SAR ADCs and easing PCB routing in mixed-signal designs. The TSM1285BCSA+ uses a charge-redistribution SAR architecture with an internal reference, internal offset calibration, and internal reference-error nulling per the manufacturer datasheet. After full-scale calibration, relative accuracy is specified against the theoretical code transfer function, supporting reliable closed-loop control and instrumentation applications where absolute transfer linearity matters. Typical applications include portable data acquisition systems, industrial process control loops, isolated sensor front ends, motor control current/voltage sense channels, and battery-powered instrumentation. The 2nd-source SOIC-8 footprint and commercial-grade temperature rating make it a flexible part for cost-sensitive mixed-signal designs. When designing with this ADC, ensure the analog input bandwidth does not exceed the device's -3 dB front-end limit; place a small RC anti-alias filter ahead of AIN. Decouple VDD with both bulk and 100 nF ceramic capacitance placed within 5 mm of the supply pin. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet, enabling faster part-selection decisions.

USD $4,10 En stock
TSM1285BCSA+T - 12-Bit 300ksps SAR ADC w/ 2.5V Ref | Silicon Labs
TSM1285BCSA+T

TSM1285BCSA+T - 12-Bit 300ksps SAR ADC w/ 2.5V Ref | Silicon Labs

The Silicon Labs TSM1285BCSA+T is a 12-bit, 300 ksps successive-approximation analog-to-digital converter (SAR ADC) with an internal +2.5 V reference, integrated track-and-hold, and a high-speed serial digital interface, packaged in an 8-pin SOIC (0.154 inch / 3.90 mm body width). It operates from a single +2.7 V to +3.6 V supply and draws less than 2.5 mA at full 300 ksps throughput. The device accepts single-ended analog inputs in the 0 V to VREF range, where VREF can be the internal 2.5 V source or an external reference up to AVDD. A SAR ADC is a precision data-acquisition converter that uses a binary search algorithm and an internal capacitive DAC to compare the sampled input against a reference voltage. It is a sub-category of analog-to-digital converters (ADC), itself a subclass of data-converter ICs within mixed-signal semiconductor devices. SAR ADCs are valued for their deterministic latency (no pipeline delay), low power consumption, and excellent DC accuracy, making them the standard choice for multiplexed data-acquisition systems, instrumentation, and sensor signal chains. Key features include ±1 LSB INL (max) typical linearity, an internal track-and-hold capable of handling input bandwidths up to several MHz, a low conversion-mode power dissipation below 2.5 mA, and a power-down mode that drops quiescent current to microamp levels for battery-powered designs. The serial interface is SPI-/QSPI-/MICROWIRE-compatible, allowing direct connection to most microcontrollers and DSPs without glue logic. Architecturally, the TSM1285BCSA+T combines a high-bandwidth track-and-hold, a charge-redistribution SAR core clocked from an internal oscillator, a low-drift buried-Zener reference (trimmed to ±2%), and a low-noise input buffer. The integrated reference removes a common BOM line, saving PCB area and lowering system cost in precision designs. Typical applications include portable instrumentation and data loggers, pen-digitizers and tablet input systems, loop-powered 4-20 mA sensor digitizers, factory-automation sensor front ends, and battery-monitoring modules for portable equipment. Designers should note that the SHDN pin must be driven logic-high for normal conversion and pulled logic-low for power-down. The internal reference output (REF) requires a 2.2 µF minimum bypass capacitor; values lower than this degrade linearity. Input signals must remain within 0 V to VREF to avoid saturation. This page synthesizes distributor pricing, pin-compatible drop-in alternatives including the Maxim MAX1285BCSA family, and practical design notes that are not consolidated in the manufacturer datasheet, supporting faster component evaluation.

USD $1,55 En stock
TSM1285BESA+ - 12-Bit 300ksps SAR ADC | Silicon Labs SOIC-8
TSM1285BESA+

TSM1285BESA+ - 12-Bit 300ksps SAR ADC | Silicon Labs SOIC-8

The Silicon Labs TSM1285BESA+ (originally Touchstone Semiconductor) is a 12-bit, 300 ksps successive-approximation analog-to-digital converter in an 8-pin SOIC package, featuring an internal 2.5 V reference and a serial SPI/QSPI/MICROWIRE-compatible interface. The single-channel, single-ended input converter targets low-power, single-supply data-acquisition applications, including industrial instrumentation, process control, and portable sensor readout. The SAR (Successive Approximation Register) architecture is a class of ADC that performs bit-by-bit comparison using an internal DAC and a comparator, achieving deterministic conversion latency and excellent DC accuracy at moderate sampling rates compared with delta-sigma (which trades speed for higher oversampling resolution) or pipeline ADCs (which need higher clock speeds and consume more power). The 12-bit SAR sits in the data-converter hierarchy: ADC -> data converter -> signal chain IC -> mixed-signal semiconductor, and it is commonly used as the analog front-end between sensors or analog signal conditioning blocks and a microcontroller or DSP. Key features include 300 ksps maximum sampling rate, an internal 2.5 V reference (eliminating an external reference IC and saving PCB area), single 4.5 V to 5.5 V analog supply, low power dissipation suitable for battery and loop-powered systems, software-configurable unipolar/bipolar input range via the reference, and a flexible serial interface that supports SPI, QSPI, and MICROWIRE. The 8-SOIC surface-mount package keeps the part compact for high-density data-acquisition boards. The internal 2.5 V reference is trimmed during manufacture and provides the conversion full-scale; this removes one component from the BOM and simplifies factory calibration. The serial interface reduces pin count (no parallel data bus), enabling direct connection to microcontrollers and DSPs without glue logic, and the wide analog supply tolerance allows operation directly from a regulated 5 V rail or a low-dropout linear regulator output. Typical applications include industrial process control loops, weigh scales, panel meters, temperature and pressure sensor digitizers, portable medical instrumentation, and battery monitoring. The 12-bit resolution suits sensor linearization, threshold detection, and slow closed-loop control, while the 300 ksps rate handles audio-bandwidth and motor-control analog channels. When designing with this device, ensure the analog input does not exceed VDD; add a small RC anti-alias filter ahead of the input pin to limit noise above 150 kHz (half the Nyquist rate). Decouple VDD with a 10 uF tantalum plus 0.1 uF ceramic pair placed within 10 mm of the pin. This page synthesizes distributor pricing, drop-in cross-references (MAX1285BESA from Maxim Integrated is a pin-compatible functional twin in the same SOIC-8 footprint), and practical design notes not found in the manufacturer datasheet alone.

USD $3,78 En stock
TSM1285BESA+T - 12-Bit 300ksps SAR ADC w/ Int Ref | Silicon Labs
TSM1285BESA+T

TSM1285BESA+T - 12-Bit 300ksps SAR ADC w/ Int Ref | Silicon Labs

The Silicon Labs TSM1285BESA+T is a 12-bit, 300 ksps successive-approximation analog-to-digital converter with an internal 2.5 V reference, offered in an 8-pin SOIC (SO) package. It provides one single-ended input channel, a serial (SPI/QSPI/MICROWIRE-compatible) interface, and operates from a single 2.7 V to 3.6 V analog and digital supply, drawing approximately 1 mA at full sampling rate. The integrated reference eliminates the need for an external precision reference, reducing BOM cost and board area in space-constrained designs. An SAR (Successive Approximation Register) ADC is a type of analog-to-digital converter that uses a binary-search algorithm against an internal or external reference to digitize an input voltage in N clock cycles, producing one sample per conversion with deterministic latency. ADCs sit within the broader data-acquisition signal chain (sensor -> front-end amplifier -> ADC -> microcontroller/DSP) and serve as the bridge between the analog physical world and digital signal processing. Low-power, single-supply 12-bit SAR ADCs like the TSM1285 are widely deployed in industrial sensors, instrumentation, and embedded monitoring. Key features include 12-bit resolution with no missing codes, a 300 ksps maximum sampling rate, an internal 2.5 V reference, a single-ended analog input, and an SPI-compatible serial output. The device delivers typical INL of +/-1 LSB and operates from -40C to +85C, making it suitable for industrial temperature environments. Low power consumption (~1 mA at 300 ksps) and a power-down mode that reduces current to nanoamp levels enable battery-powered and energy-harvesting applications. Architecturally, the TSM1285 uses a charge-redistribution SAR core with an integrated track-and-hold, a precision bandgap reference, and a serial output shift register. The internal reference is trimmed during manufacture, eliminating external trim components. The serial interface supports SPI, QSPI, and MICROWIRE modes, allowing direct connection to most microcontrollers without glue logic. Conversion is initiated via a chip-select falling edge and the result is clocked out on subsequent SCLK rising edges. Typical applications include industrial process control loop monitoring, portable battery-powered instrumentation, data-acquisition front-ends for sensor signals (temperature, pressure, strain), and embedded control systems. The internal reference simplifies designs that previously required an external reference plus a buffer amplifier. When designing with this part, place a 1 nF to 10 nF ceramic bypass capacitor as close as possible to the VDD pin and a 10 uF bulk capacitor at the supply input. Maintain a quiet analog ground return path; do not share the analog ground return with noisy digital currents. The reference decoupling capacitor (typically 4.7 uF on REF) is critical for AC performance. This page synthesizes distributor pricing, drop-in alternatives (same-brand MAX1285 family first, then cross-brand equivalents), and practical design notes not consolidated in the manufacturer datasheet.

USD $1,95 En stock
TSV524IQ4T - Quad 1.15MHz CMOS Op-Amp, RRIO | STMicroelectronics
TSV524IQ4T

TSV524IQ4T - Quad 1.15MHz CMOS Op-Amp, RRIO | STMicroelectronics

The STMicroelectronics TSV524IQ4T is a quad CMOS operational amplifier that delivers a 1.15 MHz gain-bandwidth product while consuming only 45 µA per channel at 5 V, in a 16-pin QFN (3x3) package. It operates from a single 2.7 V to 5.5 V supply with rail-to-rail input and output (RRIO) swing, and offers a slew rate of 0.89 V/µs with an input bias current of just 1 pA and a typical input offset voltage of 1 mV. What is a CMOS operational amplifier? A CMOS op-amp is a type of analog integrated circuit that uses complementary metal-oxide-semiconductor transistors in its input and gain stages. Compared to bipolar op-amps, CMOS op-amps typically offer higher input impedance, lower input bias current, and lower quiescent power consumption, making them well-suited for battery-powered and high-impedance sensor interfaces. The TSV524IQ4T sits in the broader taxonomy: operational amplifier -> amplifier IC -> analog IC -> semiconductor. Its RRIO capability means the output can swing within millivolts of both supply rails, maximizing dynamic range in low-voltage single-supply systems. Key features include the high merit factor (1.15 MHz GBW for only 45 µA supply current), 1 pA typical input bias current that simplifies high-impedance sensor signal chains, 100 pF capacitive load drive capability, and the tiny 3x3 mm QFN-16 footprint that enables dense multi-channel designs. An exposed pad (EP) on the package provides a low thermal-resistance path to the PCB, useful when several channels drive continuous loads. Architecturally, the TSV524IQ4T uses a CMOS input stage with rail-to-rail input common-mode range achieved through complementary N/P differential pairs. The output stage is a class-AB CMOS topology that delivers rail-to-rail output swing. This design optimizes the speed-to-power ratio for applications where low quiescent current matters more than raw bandwidth. Typical applications include battery-powered sensor signal conditioning, portable instrumentation, active filters, transducer interfaces, and current-sensing amplifiers. The wide supply range and RRIO capability make it a strong fit for single-cell Li-ion (3.0-4.2 V) and 3.3 V system designs. When designing with this device, note that the QFN-16 package requires careful PCB layout - the exposed thermal pad must be soldered to a sufficiently large copper area to meet the published thermal resistance and to maintain mechanical reliability. Decouple each supply pin with a 100 nF ceramic capacitor placed as close to the IC as possible. This page synthesizes distributor pricing, verified pin-to-pin drop-in alternatives, and PCB/thermal design guidance for the TSV524IQ4T that complements the manufacturer datasheet.

USD $0,97 En stock
TSV991ILT - 20MHz Rail-to-Rail Op Amp | STMicroelectronics
TSV991ILT

TSV991ILT - 20MHz Rail-to-Rail Op Amp | STMicroelectronics

The STMicroelectronics TSV991ILT is a single, high-speed, rail-to-rail input/output operational amplifier offering a gain-bandwidth product of 20 MHz and a slew rate of 10 V/µs. It operates from a supply voltage range of 2.5 V to 5.5 V, making it suitable for battery-powered and low-voltage applications. The device is available in the compact SOT-23-5 package, ideal for space-constrained designs. An operational amplifier (op-amp) is a high-gain voltage amplifier with differential inputs and a single-ended output. It is a fundamental building block in analog electronics, used in signal conditioning, filtering, and amplification. The TSV991ILT belongs to the family of general-purpose op-amps, which are characterized by their versatility and ease of use. In the hierarchy of analog components, op-amps are part of the broader category of linear integrated circuits, which also includes comparators and voltage regulators. Key features of the TSV991ILT include rail-to-rail input and output stages, which maximize the dynamic range in low-voltage applications. The device also features a low input offset voltage of 1.5 mV (max) and a low input bias current of 1 pA (typ), ensuring high accuracy in precision circuits. The 20 MHz bandwidth and 10 V/µs slew rate enable the amplifier to handle high-frequency signals, making it suitable for video and communication applications. The TSV991ILT is built on STMicroelectronics' advanced BiCMOS process, which combines the benefits of bipolar and CMOS technologies. This process achieves a good balance between speed, power consumption, and noise performance. The amplifier's quiescent current is typically 1.1 mA, providing a favorable trade-off between speed and power efficiency for battery-operated devices. Typical applications include active filters, signal conditioning, portable instrumentation, and audio processing. The rail-to-rail output capability allows the amplifier to drive ADC inputs directly, maximizing the usable input range. In sensor interfaces, the low input bias current minimizes errors when interfacing with high-impedance sensors. When designing with the TSV991ILT, ensure proper power supply decoupling with a 0.1 µF ceramic capacitor placed close to the VCC pin. The input common-mode voltage range extends beyond the supply rails, but care should be taken to avoid exceeding the absolute maximum ratings. The output can swing within 50 mV of the rails, which is beneficial for single-supply operation. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the STMicroelectronics datasheet, providing a comprehensive resource for engineers evaluating the TSV991ILT.

USD $0,34 En stock
TSX9292IST - 16MHz RR 16V CMOS Op-Amp, Dual | STMicroelectronics
TSX9292IST

TSX9292IST - 16MHz RR 16V CMOS Op-Amp, Dual | STMicroelectronics

The STMicroelectronics TSX9292IST is a dual operational amplifier featuring 16 MHz gain-bandwidth product, 27 V/µs slew rate, and 0.0003 % THD+N, housed in an 8-pin MiniSO (Mini Small Outline) package. It operates from a single 4 V to 16 V supply and provides rail-to-rail input and output swing, making it suitable for low-voltage, single-supply, and high-fidelity signal-chain designs. The two on-chip amplifiers are decompensated and stable for gains greater than +2 (or inverting gains less than -1), and each channel draws a typical 2.8 mA quiescent current. A CMOS operational amplifier (op-amp) is a high-gain DC-coupled differential amplifier built on a CMOS process. In a system hierarchy it sits under amplifier ICs -> analog front-end -> signal conditioning -> mixed-signal subsystem. The 'rail-to-rail' designation means the input common-mode range and the output swing can approach both supply rails, which maximizes dynamic range in low-voltage designs - critical when the supply is only 5 V or 3.3 V and every millivolt of headroom counts. Key features include 16 MHz GBP, 27 V/µs slew rate, 0.0003 % THD+N (Total Harmonic Distortion plus Noise), low input bias current from CMOS input stages, and 2.8 mA per-channel quiescent current. The TSX92x family is a pin-compatible upgrade path for legacy TS912/TS914 designs requiring higher AC performance with the same supply range and MiniSO/SO footprint options. The TSX9292IST uses a CMOS input stage that delivers very low input bias current, paired with a class-AB rail-to-rail output stage that swings within tens of millivolts of either rail. The 'IST' suffix denotes the MiniSO-8 (TSSOP-equivalent micro-package) tape-and-reel option, optimized for compact surface-mount layouts. Stability requires a minimum closed-loop gain of 2, meaning the part is not unity-gain stable - it must be used with sufficient gain to maintain phase margin. Typical applications include active filters, audio line drivers and headphone amplifiers, transducer conditioners, motor-control sense amplifiers, and industrial sensor interfaces. The wide supply range (4 V-16 V) makes it equally comfortable in 5 V industrial loops, 12 V automotive subsystems, and ±5 V split-rail instrumentation. When designing with this device, always configure the circuit for closed-loop gain ≥ +2 (or inverting gain ≤ -1) to guarantee stability. Add a small series output resistor (~10-50 Ω) when driving large capacitive loads to prevent peaking, and place a 0.1 µF decoupling capacitor close to each supply pin. Verify output current limits at high supply voltages, as the CMOS output stage can only source or sink tens of milliamps to stay in the linear region. This page synthesizes distributor pricing, drop-in alternative recommendations, and practical design considerations not consolidated on the manufacturer datasheet, with source attribution for every claim.

USD $1,05 En stock
TUSB2040N - 4-Port USB 1.0 Hub Controller | Texas Instruments
TUSB2040N

TUSB2040N - 4-Port USB 1.0 Hub Controller | Texas Instruments

Texas Instruments TUSB2040N is a four-port USB 1.0-compatible hub controller with integrated USB transceivers, per-port power switching, and overcurrent reporting. The device supports four downstream ports and two power-source arrangements: self-powered mode and bus-powered mode. It is packaged as a 28-pin PDIP according to the retrieved distributor records. The verified source identifies the TUSB2040 family as a universal serial bus hub controller and does not provide additional electrical timing, current, or temperature values. A USB hub controller is an interface IC that connects one upstream USB port to multiple downstream ports, allowing peripherals to share a host controller. Within the hierarchy of USB interface devices, transceiver, hub controller, interface IC, and semiconductor, the TUSB2040N provides the logic and physical connectivity for expanding USB 1.0 equipment. Its integrated transceivers reduce the need for separate USB transceiver circuitry on the hub board. The principal verified features are four downstream ports, integrated USB transceivers, USB 1.0 compliance, self-powered operation, bus-powered operation, per-port power switching, overcurrent reporting, per-port or ganged power modes, and suspend support. These functions suit hubs where the host must enumerate multiple peripherals and where each downstream port needs controllable power. The retrieved distributor listing describes the part as an interface controller, while the family datasheet result specifically identifies four-port USB hub functionality. The TUSB2040N is intended for USB 1.0 hub designs, including peripheral expansion, legacy computer interfaces, industrial equipment, and embedded systems that use multiple low-speed, full-speed, or compatible USB devices. Its architecture places port power management close to the USB interface, allowing the design to report overcurrent conditions and manage downstream power distribution. Exact propagation delays, operating voltage, maximum downstream current, and USB data-rate details are not present in the verified web data and must be confirmed from the manufacturer datasheet before a new design is released. For implementation, follow the TUSB2040 family datasheet for pin assignments, transceiver connections, power-source selection, capacitor values, and port-power topology. Pay particular attention to upstream and downstream USB differential routing, ground-plane continuity, and current-limit behavior. Because the verified record lists a PDIP package, verify physical dimensions and pin orientation against the actual manufacturer drawing rather than relying only on distributor metadata. This page combines the verified distributor and datasheet-search records with clearly marked missing-data fields. It does not infer prices, lifecycle claims, pin names, or electrical limits that were not supplied. Buyers should request a quotation for current commercial availability and confirm the exact package, ordering suffix, and production status with Texas Instruments before committing a design to production.

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TUSB2046BVFR - 4-Port USB 2.0 Full-Speed Hub | TI
TUSB2046BVFR

TUSB2046BVFR - 4-Port USB 2.0 Full-Speed Hub | TI

The Texas Instruments TUSB2046BVFR is a 4-port USB 2.0 full-speed (12 Mbps) hub controller with one upstream port and four downstream ports, implemented as a pure state-machine (no CPU core) in a 32-pin LQFP (VF, 7x7 mm) package. It operates from a single 3.0 V to 3.6 V supply, drawing approximately 40 mA, over a 0 C to 70 C commercial temperature range. A USB hub controller is a dedicated interface IC that expands a single USB upstream connection into multiple downstream ports, handling enumeration, transaction translation at the protocol level, and per-port power management. Within the system hierarchy it sits in the connectivity layer: interface IC > USB controller > hub controller, alongside host controllers and device controllers in a complete USB subsystem. Key features include full compliance with the USB specification as a full-speed hub (TI design TID #30220231), integrated USB transceivers that eliminate external PHY components, and an optional serial EEPROM interface for storing customized VID/PID and configuration data. Support for Win95/DOS-style operation and a pure hardware state-machine architecture reduce firmware complexity to zero - the hub enumerates automatically on plug-in. The TUSB2046B is fabricated on a low-power 3.3 V ASIC CMOS process. Because there is no embedded microcontroller, no firmware development, flash programming, or in-circuit emulator is required, which shortens qualification cycles and removes a whole class of field-update failure modes. The device supports individual downstream port power switching and overcurrent status inputs for compliant bus-powered and self-powered hub designs. Typical applications include standalone USB hubs, monitor and keyboard-display hubs, industrial and medical equipment USB expansion, and adding USB ports to embedded systems built around host processors without native hub capability. For design, provide 0.1 uF decoupling at each supply pin, strap configuration pins (or fit the optional EEPROM) for power-mode selection, and size port power switches per downstream port load. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

USD $2,11 En stock
TUSB2046BVFRG4 - 4-Port USB 2.0 Full-Speed Hub | Texas Instruments
TUSB2046BVFRG4

TUSB2046BVFRG4 - 4-Port USB 2.0 Full-Speed Hub | Texas Instruments

The Texas Instruments TUSB2046BVFRG4 is a 4-port USB 2.0 full-speed hub controller operating at 12 Mbps from a 3.3 V supply, housed in a 32-pin LQFP (7x7 mm) package with an optional serial EEPROM interface and a 0C to +70C commercial operating range. A USB hub controller is an interface IC that expands a single upstream USB port into multiple downstream ports, handling enumeration, transaction translation at the protocol level, and port power management. It sits within the USB device hierarchy between the host controller and downstream peripherals, forming a sub-family of the broader USB interface and connectivity IC class within semiconductor interface products. Key features include one upstream port and four downstream ports compliant with the USB 2.0 specification at full speed (12 Mbps), support for both low-speed (1.5 Mbps) and full-speed downstream devices, an optional serial EEPROM interface for storing vendor ID / product ID configuration data, and overcurrent detection inputs with power-switch control outputs for per-port or ganged power switching. Implementation with a digital state machine instead of an embedded microcontroller eliminates firmware development and reduces BOM complexity. Technical depth: because the TUSB2046B is a pure hardware state-machine design, enumeration latency is deterministic and there is no firmware to qualify, update, or corrupt. The 3.3 V CMOS core with integrated 3.3 V regulator support keeps external components minimal, typically requiring only a 6 MHz or 48 MHz clock source, bypass capacitors, and the external power switches for downstream VBUS. Typical applications include PC monitor hubs, docking stations, industrial panel USB expansion, printer and multifunction peripheral front panels, and embedded systems requiring additional USB ports from a single host connection. The 12 Mbps full-speed rating suits HID devices, flash drives, and instrumentation rather than high-bandwidth video or mass-storage arrays. Design consideration: budget downstream VBUS power carefully - each downstream port may supply up to 500 mA at 5 V per the USB specification, so external power MOSFET switches and overcurrent sensing resistors must be sized for the aggregate load, and the OVERCURRENT inputs must be wired to the correct power-switch pins. This page synthesizes distributor pricing context, drop-in alternatives, lifecycle status, and practical design notes not found in the manufacturer datasheet alone.

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TUSB2140N - 4-Port USB 2.0 Hub Controller | Texas Instruments
TUSB2140N

TUSB2140N - 4-Port USB 2.0 Hub Controller | Texas Instruments

Texas Instruments TUSB2140N is a 4-port USB 2.0 hub controller with embedded function, a maximum clock frequency of 48 MHz, I2C bus compatibility, and a 40-pin through-hole DIP package. It is designed for industrial USB hub equipment requiring multiple downstream ports and centralized control. The verified sources identify TUSB2140N as the original 40-PDIP member of the TUSB2140 family and note that it was replaced by TUSB2046B. A USB hub controller is an interface IC that manages traffic between one upstream USB host connection and multiple downstream USB ports. Within the product hierarchy, it is a USB interface controller, bus controller, interface IC, and semiconductor. By organizing USB connectivity and exposing configuration functions through a compatible control bus, this type of device reduces the amount of discrete logic required in a multiport USB product. The TUSB2140N provides four downstream hub ports, operates up to 48 MHz, supports I2C compatibility, and is available in a 40-terminal rectangular DIP package. The verified distributor data classifies it as an industrial-temperature component with through-hole terminals. These characteristics make it relevant to legacy industrial USB hubs, embedded USB expansion equipment, and systems designed around the original TUSB2140 interface rather than newer hub controllers. Technically, the device combines USB host-interface management and an embedded function in one controller. Its 48 MHz maximum operating frequency supports the clocking requirements associated with this USB 2.0 hub-controller generation, while I2C compatibility offers a practical path to configuration and supervisory control. The 40-pin DIP format favors through-hole assembly and repairability, but it consumes considerably more board area than contemporary surface-mount hub controllers. Typical applications include industrial USB hubs, embedded test equipment, peripheral aggregation systems, legacy USB expansion cards, and OEM products that retain the TUSB2140 architecture. Because the part is an older through-hole design, engineers should also assess modern surface-mount alternatives or the indicated TUSB2046B successor when new PCB area, sourcing, or lifecycle constraints favor redesign. The primary design consideration is lifecycle and availability. Verified marketplace data states that TUSB2140N was replaced by TUSB2046B, while current stock and pricing are offered through brokers and distributors. For new production, confirm lifecycle status, exact electrical compatibility, and pin-level equivalence before substituting any successor; a USB hub change can affect enumeration, power management, and downstream-port behavior. This page consolidates verified distributor specifications, the replacement relationship, source links, and engineering selection guidance. It distinguishes documented TUSB2140N attributes from unavailable parameters, helping procurement and design engineers make a grounded legacy-support or migration decision.

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TUSB320HAIRWBR - USB Type-C CC Logic, X2QFN-12 | TI
TUSB320HAIRWBR

TUSB320HAIRWBR - USB Type-C CC Logic, X2QFN-12 | TI

The Texas Instruments TUSB320HAIRWBR is a USB Type-C Configuration Channel (CC) logic and port controller in an industrial-grade (I-temp) active-high enable variant, packaged in a 12-pin X2QFN (RWB) measuring 1.6 mm × 1.6 mm. The device operates from a single 3.3 V supply and supports USB Type-C Specification 1.1 while remaining interoperable with 1.0 systems. It advertises and detects up to 3 A of VBUS current per Type-C current-mode rules and supports DFP (Source), UFP (Sink), and DRP (Dual Role) port roles selected through MODE pins. A USB Type-C Configuration Channel Logic IC is a state-machine controller that sits between a USB Type-C receptacle and the application processor or USB controller. Its job is to negotiate attach/detach events, cable orientation (CC1/CC2 polarity), role (host vs device), and current advertisement (default 500 mA, 1.5 A, or 3 A) through the CC1/CC2 pull-up and pull-down signalling defined by the USB-IF Type-C specification. Higher up the hierarchy it is an Interface IC > USB Interface IC; below it is the CC PHY layer. Key features include: integrated 5.1 kΩ CC pull-up resistors that can be toggled for DRP toggle, hardware MODE pin configuration (no firmware needed), active-high enable (EN) pin for power sequencing, low standby current with a dedicated low-power mode, and HBM ESD protection on CC pins. The X2QFN-12 RWB package keeps the device under 3 mm² footprint, ideal for compact dongles, hubs, and embedded platforms. Typical applications are any 5 V / 3 A USB Type-C ports that need a low-BOM CC controller: travel chargers, USB Type-C dongles, adapters, hubs, docking stations, smartphones, tablets, and notebooks. Because it operates as a standalone state machine with no MCU required, it is well-suited to cost- and board-area-sensitive designs. Design consideration: place the 100 nF decoupling capacitor within 2 mm of VCC and keep the CC traces short, matched, and away from switching nodes to preserve signal integrity. A 0 Ω or ferrite series resistor on VBUS is optional but recommended to limit inrush current at attach. This page synthesizes distributor pricing, drop-in alternatives, application pairings, and design notes not found in the manufacturer datasheet, optimized for engineers sourcing USB Type-C port controllers.

USD $0,91 En stock
TUSB320LAIRWBR - USB Type-C CC Logic & Port Controller | TI
TUSB320LAIRWBR

TUSB320LAIRWBR - USB Type-C CC Logic & Port Controller | TI

The Texas Instruments TUSB320LAIRWBR is a USB Type-C configuration channel (CC) logic and port controller housed in a 12-pin X2QFN (RWB) package measuring 1.6 mm x 1.6 mm. It supports USB Type-C Specification 1.1, is backward compatible with 1.0, advertises and detects up to 3 A of VBUS current, and operates from a 2.7 V to 5 V supply. Configuration modes include Host Only (DFP/Source), Device Only (UFP/Sink), and Dual Role Port (DRP) for accessories, hubs, smartphones, and laptops. The "L" variant removes I2C and adds GPIO-controlled mode selection for ultra-low-power BOMs. What is a USB Type-C port controller? A USB Type-C port controller is an interface IC that sits between a USB 2.0 data path and the Type-C receptacle, managing the Configuration Channel (CC) pins that detect cable attach/detach, determine plug orientation (CC1 vs CC2), advertise the source/sink current capability through Rp/Rd pull-up/pull-down resistors, and negotiate power-role swap for USB Power Delivery. It belongs to the broader hierarchy of interface ICs -> USB interface ICs -> Type-C controllers -> USB Power Delivery controllers, occupying the link layer just above the physical connector. Key differentiating features include integrated CC logic, automatic DRP toggle, support for audio and debug accessory modes, an active-high ENABLE pin, and an open-drain INT output for interrupt-driven host polling. The device is offered in both I2C-configurable (TUSB320I) and pin-strapped/GPIO (TUSB320L) variants within the same X2QFN-12 footprint, allowing PCB reuse between firmware-driven and BOM-optimized designs. Operating temperature is -40 C to +85 C (industrial). The TUSB320L architecture is a pure hardware state machine that samples the CC1/CC2 pins, drives the appropriate Rp current source or Rd pull-down, and reports attach/orientation events to the application processor through dedicated GPIO flags. This eliminates the firmware overhead of I2C register polling and reduces quiescent current for battery-powered devices. Compared to discrete USB-C implementations using comparators and FETs, the TUSB320L integrates Rp/Rd biasing and accessory detection in a single 1.6 mm x 1.6 mm chip. Typical applications include USB Type-C wall adapters, smartphone charging cradles, accessory-mode audio adapters, USB-C hubs and docks, notebook and tablet Type-C ports, and USB-C debug ports for embedded development. It is widely used wherever a 5 V / up to 3 A Type-C source or sink is needed without USB PD negotiation. A key design tip - because the TUSB320L has no I2C, role selection and current-mode advertisement must be hard-wired through MODE pin resistors at power-up. Layout the CC1/CC2 traces as a 90 ohm differential pair with the connector ground return, and decouple VDD with a 0.1 uF X7R ceramic placed within 2 mm of pin 12. This page synthesizes TI datasheet parameters, distributor pricing, drop-in alternatives (same-brand first, cross-brand verified), and PCB design notes not duplicated in the manufacturer datasheet, giving procurement and design engineers a one-stop reference for the TUSB320LAIRWBR.

USD $0,74 En stock
TUSB321RWBR - USB Type-C CC Logic 3A X2QFN-12 | Texas Instruments
TUSB321RWBR

TUSB321RWBR - USB Type-C CC Logic 3A X2QFN-12 | Texas Instruments

The Texas Instruments TUSB321RWBR is a USB Type-C configuration channel (CC) logic and port control device with VCONN support, packaged in a 12-pin X2QFN (1.6x1.6 mm) land-grid array. It implements the CC signaling required by USB Type-C Specification 1.1 and remains backward compatible with USB Type-C Specification 1.0, advertising up to 3 A of current through a dedicated current mode pin. A USB Type-C CC logic device is a specialized interface IC that manages the configuration channel pins of a USB Type-C connector. Within the system hierarchy, it sits between the USB Type-C connector and the USB controller or power path, belonging to the interface IC family inside integrated circuits. The CC logic block monitors the CC1 and CC2 pins for pullup or pulldown resistances to determine port attach and detach, cable orientation, and role detection, which are mandatory functions for any Type-C port. Key features include three mode configurations - host only (DFP/Source), device only (UFP/Sink), and dual role port (DRP) - where the device alternates between DFP and UFP roles per the Type-C Specifications. An integrated VCONN switch powers electronically marked (e-marked) cables, and dead battery mode allows a sink device to present as a Type-C device even before system power is available. Technically, the TUSB321 integrates CC termination, Rp/Rd detection, cable orientation indication, and port power control in a single low-power die, minimizing external components and bill-of-materials cost. The compact X2QFN package with 1.6x1.6 mm footprint suits space-constrained portable designs. Typical applications include smartphones, tablets, laptops, docking stations, chargers, and USB Type-C enabled accessories. Any design needing compliant Type-C attach detection and current advertisement benefits from this device. For design, place the TUSB321RWBR close to the Type-C connector to keep CC traces short, decouple VCC with a 1 uF capacitor, and configure the current mode pin for the intended 3 A advertisement level as described in TI datasheet (SLVSDF4).

USD $0,35 En stock
TUSB321RWBR-Q1 - USB Type-C CC Logic Port Control | TI
TUSB321RWBR-Q1

TUSB321RWBR-Q1 - USB Type-C CC Logic Port Control | TI

The Texas Instruments TUSB321RWBR-Q1 is an automotive-grade USB Type-C configuration channel (CC) logic and port control IC with VCONN support, provided in a compact 12-pin X2QFN package measuring just 1.6 mm x 1.6 mm. Operating from a 4.5V to 5.5V supply, it enables USB Type-C ports with the CC logic needed for Type-C ecosystems while meeting the USB Type-C Specification 1.1 and remaining backward compatible with Specification 1.0. A USB Type-C port controller (also called a CC logic chip or port control IC) is a small companion device that manages the configuration channel pins of a Type-C connector. It sits in the hierarchy: port controller -> USB interface IC -> USB connectivity semiconductor -> power/data management. It detects attach and detach events, determines cable orientation, performs role detection, and advertises current capability through the dedicated current mode pin. Key features include support for up to 3A of current advertisement through the dedicated current mode pin, configurable port roles of DFP (source), UFP (sink), or dual role port (DRP), and integrated VCONN supply switching for actively marked cables. The device autonomously handles Rd/Rp termination switching on the CC pins according to cable orientation, offloading this logic from the system microcontroller. The TUSB321 implements the CC layer with a simple pin-strap configuration (PORT pin) rather than an I2C interface, minimizing firmware complexity and cost for systems that do not need Power Delivery negotiation. Its automotive qualification (AEC-Q100) makes it suitable for infotainment, telematics, and charging ports in vehicles, while the 1.6 mm x 1.6 mm X2QFN footprint fits space-constrained smartphone, tablet, and accessory designs. Typical applications include automotive USB Type-C charging ports, host and device port attach detection in notebooks, docking stations, and power-bank sink/source role management. Design tip: strap the PORT pin for the required role at power-up; if you later need USB Power Delivery negotiation, migrate to the I2C-controlled TUSB322 family, which shares the same X2QFN footprint.

USD $0,33 En stock
TUSB4041IPAPQ1 - 4-Port USB 2.0 Hub AEC-Q100 | Texas Instruments
TUSB4041IPAPQ1

TUSB4041IPAPQ1 - 4-Port USB 2.0 Hub AEC-Q100 | Texas Instruments

The Texas Instruments TUSB4041IPAPQ1 is an automotive-qualified 4-port high-speed 480-Mbps USB 2.0 hub controller in a 64-pin HTQFP (PAP) package with exposed pad. It provides four downstream USB 2.0 ports from a single upstream port, full-speed (12 Mbps), high-speed (480 Mbps), and low-speed (1.5 Mbps) signaling, and operates over -40C to +85C with an automotive-grade qualification. A USB 2.0 hub is a critical interface IC that expands a single USB root port into multiple downstream ports, providing downstream device connect/disconnect detection, overcurrent protection coordination, transaction translation between split USB transactions, and configurable port-power switching. The TUSB4041IPAPQ1 sits in the USB hub controller product hierarchy (USB 2.0 hub -> USB hub -> USB interface IC -> interface IC -> semiconductor) and is widely deployed in automotive infotainment, body electronics, and rear-seat entertainment systems. Key features include integrated USB 2.0 high-speed PHY on every port, pin-strap configuration for battery-charging support, customization via OTP ROM, I2C EEPROM, or I2C/SMBus target interface for VID/PID/port/phy settings, optional upstream port indicator, and individual port power control with overcurrent sensing. The device uses a single 3.3 V supply plus an internal 1.1 V core regulator generated by the on-chip LDO. Internal termination, pull-up/pull-down resistors, and a built-in 5 V VBUS load switch controller (external n-MOSFET required) simplify PCB design. Suspend and remote wakeup signaling are managed in hardware, reducing firmware complexity. Typical applications include automotive head-unit USB ports, rear-seat entertainment hubs, body-control module USB service ports, industrial PC USB expansion, and embedded telematics USB interfaces. AEC-Q100 qualification makes the -Q1 device preferred for road-vehicle applications, while the non-Q1 TUSB4041IPAP serves commercial/industrial environments. When designing with this part, place the external 24.576 MHz crystal (or oscillator) within 5 mm of the XI/XO pins and provide a continuous ground reference under the exposed thermal pad for thermal and EMI performance. Per-port 5 V VBUS switches must use a logic-level n-MOSFET driven by the integrated DP1PWR output to share load-current and fault indications with the host. This page synthesizes distributor pricing for automotive-grade USB hubs, pin-compatible drop-in alternatives, and design considerations from the manufacturer datasheet not always highlighted on distributor listings.

USD $3,85 En stock