10AS032E4F27I3LG vs 10AS032E4F27I3SG Comparación
Comparación detallada lado a lado de 10AS032E4F27I3LG por Intel y 10AS032E4F27I3SG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AS032E4F27I3LG | 10AS032E4F27I3SG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.085,10 | $1.465,00 |
| Family | Arria 10 SX SoC FPGA | — |
| Logic Elements | 320,000 | 320,000 |
| Hard Processor Subsystem (HPS) | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Frequency | 1.5 GHz | Up to 1.5 GHz |
| Speed Grade | E4 (-4, mid-tier) | — |
| Temperature Grade | Industrial (-40C to +100C) | — |
| Encapsulado | 672-pin FCBGA (F27, 27x27 mm) | 672-pin FCBGA (Flip-Chip BGA), 27 x 27 mm |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Nivel MSL | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | — |
| Process Technology | 20 nm | 20 nm |
| Transceivers | Up to 24 channels, up to 14.1 Gbps (family-level) | — |
| DSP Blocks | Hardened floating-point DSP (family-level) | — |
| Memory Interfaces | DDR3 / DDR4 with hard controllers (family-level) | — |
| Configuration Method | JTAG, ASx4, FPP (family-level) | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | Arria 10 SX |
| Device Family | — | Arria 10 SX SoC FPGA |
| Hard Processor System | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| Core Voltage (typ.) | — | 0.9 V |
| Terminal Form | — | Ball |
| Number of Terminals | — | 672 |
| Operating Temperature Grade | — | Industrial (-40C to +100C junction) |
| Compliance / Lead-Free | — | RoHS compliant, lead-free |
| Estado del ciclo de vida | — | Active |
| FPGA Architecture | — | SRAM-based, volatile configuration |