10AS032E4F29I3LG vs 10AS032E4F27I3LG Comparación
Comparación detallada lado a lado de 10AS032E4F29I3LG por Altera y 10AS032E4F27I3LG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
10AS032E4F29I3LG - Arria 10 SX SoC FPGA, 320K LE, 780-FBGA | Altera
10AS032E4F29I3LG ✓ Activo
Comparación de especificaciones
| Parámetro | 10AS032E4F29I3LG | 10AS032E4F27I3LG |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.920,00 | $1.085,10 |
| Device Family | Arria 10 SX | — |
| Logic Elements | 320K | 320,000 |
| Hard Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Core Frequency | 1.5 GHz | — |
| Fabric Speed Grade | 4 | — |
| Temperature Grade | Industrial | Industrial (-40C to +100C) |
| Encapsulado | 780-FBGA, FC (29x29 mm) | 672-pin FCBGA (F27, 27x27 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Terminal Form | Ball | — |
| Number of Terminals | 780 | — |
| Package Code | BGA | — |
| Package Shape | Square | — |
| Lead-Free / RoHS | Yes (RoHS compliant) | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | Hardened floating-point DSP (family-level) |
| Transceiver Count | [DATA_NEEDED: number of transceivers and data rate] | — |
| Embedded Memory | [DATA_NEEDED: M20K/MLAB bits] | — |
| Family | — | Arria 10 SX SoC FPGA |
| Hard Processor Subsystem (HPS) | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Frequency | — | 1.5 GHz |
| Speed Grade | — | E4 (-4, mid-tier) |
| Estado RoHS | — | Compliant |
| Lead-Free | — | Yes |
| Nivel MSL | — | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] |
| Process Technology | — | 20 nm |
| Transceivers | — | Up to 24 channels, up to 14.1 Gbps (family-level) |
| Memory Interfaces | — | DDR3 / DDR4 with hard controllers (family-level) |
| Configuration Method | — | JTAG, ASx4, FPP (family-level) |