10AS032E4F29I3LG vs 10AS032E4F27I3LG Comparison
Detailed side-by-side comparison of 10AS032E4F29I3LG by Altera and 10AS032E4F27I3LG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
10AS032E4F29I3LG - Arria 10 SX SoC FPGA, 320K LE, 780-FBGA | Altera
10AS032E4F29I3LG ✓ ActiveSpecification Comparison
| Parameter | 10AS032E4F29I3LG | 10AS032E4F27I3LG |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,920.00 | $1,085.10 |
| Device Family | Arria 10 SX | — |
| Logic Elements | 320K | 320,000 |
| Hard Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Core Frequency | 1.5 GHz | — |
| Fabric Speed Grade | 4 | — |
| Temperature Grade | Industrial | Industrial (-40C to +100C) |
| Package | 780-FBGA, FC (29x29 mm) | 672-pin FCBGA (F27, 27x27 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Terminal Form | Ball | — |
| Number of Terminals | 780 | — |
| Package Code | BGA | — |
| Package Shape | Square | — |
| Lead-Free / RoHS | Yes (RoHS compliant) | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | Hardened floating-point DSP (family-level) |
| Transceiver Count | [DATA_NEEDED: number of transceivers and data rate] | — |
| Embedded Memory | [DATA_NEEDED: M20K/MLAB bits] | — |
| Family | — | Arria 10 SX SoC FPGA |
| Hard Processor Subsystem (HPS) | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Frequency | — | 1.5 GHz |
| Speed Grade | — | E4 (-4, mid-tier) |
| RoHS Status | — | Compliant |
| Lead-Free | — | Yes |
| MSL Level | — | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] |
| Process Technology | — | 20 nm |
| Transceivers | — | Up to 24 channels, up to 14.1 Gbps (family-level) |
| Memory Interfaces | — | DDR3 / DDR4 with hard controllers (family-level) |
| Configuration Method | — | JTAG, ASx4, FPP (family-level) |