10AS032H2F34E2SG vs 10AS032H2F34E2LG Comparación
Comparación detallada lado a lado de 10AS032H2F34E2SG por Altera y 10AS032H2F34E2LG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AS032H2F34E2SG | 10AS032H2F34E2LG |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.410,00 | $1.380,00 |
| Family | Arria 10 SX | Arria 10 SX |
| Device | 10AS032 | — |
| Logic Elements | 320,000 | 320,000 |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Frequency | 1.5 GHz (max) | — |
| Process Technology | 20 nm | — |
| Encapsulado | 1152-pin FC-FBGA (F34), 35 x 35 mm | 1152-ball FC-FBGA (F34), 35 x 35 mm |
| Tipo de montaje | Surface Mount, BGA | Surface Mount (BGA) |
| Estado RoHS | Compliant | Compliant |
| Core Voltage | 0.9 V (typical) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature grade] | — |
| Logic Array Blocks | [DATA_NEEDED: LAB count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | Variable-precision, IEEE 754 single-precision FP support |
| Transceivers | [DATA_NEEDED: transceiver count and rate] | Up to 14.1 Gbps [DATA_NEEDED: exact count for F34 package] |
| Memory | Integrated DDR4 hard memory controller | — |
| Package Code | BGA | — |
| Package Shape | Square | — |
| Terminal Form | Ball | — |
| Terminal Count | 1152 | — |
| Device Tier | — | 10AS032 (mid-density) |
| Configuration | — | SoC FPGA (HPS + FPGA fabric) |
| Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Operating Frequency | — | 1.5 GHz |
| Speed Grade | — | 2 |
| Temperature Grade | — | E2 (commercial/extended) |
| On-chip Memory (M20K blocks) | — | Approx. 21 Mb [DATA_NEEDED: exact Mb from datasheet] |
| Memory Controller Hard IP | — | DDR4, DDR3, QDRII+, RLDRAM3 |
| Process Node | — | 20 nm |
| Form of Terminal | — | Ball (BGA) |
| Terminal Pitch | — | 1 mm |