10AX090R4F40E3LG vs 10AX090R3F40E2LG Comparación
Comparación detallada lado a lado de 10AX090R4F40E3LG por Intel y 10AX090R3F40E2LG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AX090R4F40E3LG | 10AX090R3F40E2LG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4.415,91 | $5.750,00 |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements | 900000 | 900,000 |
| Embedded Memory Bits | 59234304 | — |
| User I/O Pins | 342 | — |
| Core Voltage | 0.9 V | — |
| Process Technology | 20 nm | 20 nm |
| Encapsulado | 1517-ball FCBGA (F40) | 1517-Ball FCBGA |
| Speed Grade | E3 (enhanced mid-grade) | — |
| Estado RoHS | Compliant (LG suffix) | Compliant |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature grade] | — |
| Transceiver Count | [DATA_NEEDED: number of transceivers] | — |
| Transceiver Max Data Rate | [DATA_NEEDED: max transceiver rate] | — |
| DSP Blocks | [DATA_NEEDED: DSP slice count] | Hardened fixed/floating-point DSP blocks (on-die) |
| Nivel MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Lead-Free | Yes | — |
| Sin halógenos | [DATA_NEEDED: halogen-free status] | — |
| Configuration Method | SRAM-based, volatile | — |
| Design Tool | Intel Quartus Prime | — |
| Embedded Memory | — | 59,234,304 bits |
| User I/O Count | — | 342 |
| Core Supply Voltage | — | 0.9 V |
| Package Type | — | Flip-Chip Ball Grid Array |
| Number of Terminals | — | 1517 |
| Transceivers | — | Multi-gigabit serial transceivers (on-die) |
| Memory Interfaces | — | Hardened DDR3/DDR4 memory controller IP |
| Hard IP | — | PCI Express Gen3, 10/40/100 GbE Ethernet |
| Configuration | — | Partial reconfiguration supported |