10AX090S3F45E2LG vs 10AX090S3F45I2LG Comparación
Comparación detallada lado a lado de 10AX090S3F45E2LG por Intel y 10AX090S3F45I2LG por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
10AX090S3F45I2LG - Arria 10 GX 900K LE FPGA, 1932-FCBGA | Intel / Altera
10AX090S3F45I2LG ✓ ActivoComparación de especificaciones
| Parámetro | 10AX090S3F45E2LG | 10AX090S3F45I2LG |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $12.480,00 | $4.050,00 |
| Series | Arria 10 GX | Arria 10 GX |
| Logic Elements | 900,000 | 900,000 |
| Adaptive Logic Modules (ALMs) | 339,620 | — |
| Embedded Memory (bits) | 59,234,304 | — |
| DSP Blocks | 1,518 | 759 (variable-precision, hardened 27x27 multipliers) |
| Transceivers | 624 (per package aggregate channels) | Up to 24.0 Gbps (GX family) |
| Maximum Transceiver Data Rate | 17.4 Gbps (GX variant, datasheet ceiling up to 25.78 Gbps on GT) | — |
| Encapsulado | 1932-ball FCBGA (F45, 45mm flip-chip BGA) | 1932-ball FCBGA (F45, 45x45 mm) |
| Process Node | TSMC 20nm | — |
| Core Voltage (nominal) | 0.9 V | — |
| User I/O Banks | 12 | — |
| Maximum User I/O | 624 | — |
| Rango de temperatura de funcionamiento | 0C to 100C (E2 commercial) | — |
| Speed Grade | S3 (-2 speed grade equivalent) | -I2 (industrial) |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Estado RoHS | Compliant | Compliant |
| Memory Interfaces | DDR4 up to 2666 MT/s, DDR3, QDR IV, RLDRAM 3 | — |
| Embedded Memory | — | 59,234,304 bits (1,830 M20K blocks) |
| User I/O Count | — | 624 |
| PCIe Hard IP | — | PCI Express Gen3 x8 (hardened) |
| Memory Interface Hard IP | — | DDR4 / LPDDR4 / DDR3 up to 2666 Mbps |
| Temperatura de funcionamiento | — | -40C to +100C (industrial Tj) |
| Process Technology | — | 20nm Tri-Gate |
| Configuration | — | Partial reconfiguration, AES-256 bitstream encryption |
| Supply Voltage (Core) | — | 0.85 V (nominal VCORE) |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |