10AX115N2F45E2LG vs 10AX115N4F45E3LG Comparación
Comparación detallada lado a lado de 10AX115N2F45E2LG por Intel y 10AX115N4F45E3LG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AX115N2F45E2LG | 10AX115N4F45E3LG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7.580,55 | $7.100,00 |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements (LE) | 1,150,000 | 1,150,000 |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | 427,200 |
| Embedded Memory | 68,857,856 bits (M20K + MLAB) | 68,857,856 bits (8,532 Kbits per M20K block) |
| DSP Blocks | [DATA_NEEDED: DSP count] | 3,376 (variable-precision, 18x19 multipliers) |
| User I/O Pins | 768 | — |
| Maximum Transceiver Data Rate | 28.05 Gbps | — |
| Transceivers | [DATA_NEEDED: number of transceivers] | Up to 96 channels at up to 17.4 Gbps |
| Process Technology | 20 nm TSMC | TSMC 20nm |
| Core Voltage | 0.9 V | — |
| Encapsulado | 1932-ball FCBGA (F45) | 1932-ball FCBGA (F45, 45x45 mm) |
| Hard Processor System (HPS) | Not included (GX variant, no HPS) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: temperature grade] | Extended (E) industrial grade per ordering code |
| Configuration Memory | Embedded SRAM-based, requires external boot flash | — |
| Estado RoHS | Compliant | Compliant |
| Development Tool | Intel Quartus Prime | — |
| Maximum User I/O Pins | — | 768 |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore |
| Memory Interfaces | — | DDR4, DDR3, QDR-IV, RLDRAM III (hard controller) |
| PCIe Hard IP | — | PCIe Gen3 x8 (hard IP block) |
| PLLs | — | 24 |
| Tipo de montaje | — | Surface Mount (BGA) |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Voltage Rails | — | Core 0.9 V, transceiver 1.0/1.1 V, I/O bank-dependent |