10CL025YE144I7G vs 10CL025YE144C6G Comparación
Comparación detallada lado a lado de 10CL025YE144I7G por Intel y 10CL025YE144C6G por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10CL025YE144I7G | 10CL025YE144C6G |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $35,80 | $21,89 |
| Series | Cyclone® 10 LP | Cyclone 10 LP |
| Family | Cyclone 10 LP FPGA | Cyclone 10 LP Field Programmable Gate Array |
| Logic Elements (LE) | 24,624 (25K) | — |
| Embedded Memory | 594 Kbits (M9K blocks) | — |
| Embedded Multipliers | 66 (18x18 DSP blocks) | — |
| PLLs | 4 | 4 |
| Maximum User I/O | 246 (family max); 76 in this 144-EQFP | — |
| User I/O Pins (this package) | 76 | — |
| Encapsulado | 144-EQFP (EQFP-144) with exposed thermal pad | 144-LQFP Exposed Pad (EQFP-144), 22x22 mm |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | -40C to +100C (industrial, I7 grade) | 0C to +85C (commercial) |
| Supply Voltage - Core | 1.2 V | — |
| Supply Voltage - I/O | 1.2 V to 3.3 V | — |
| Process Technology | 60 nm TSMC low-power | — |
| Estado RoHS | Compliant (lead-free, 'Y' suffix) | — |
| Configuration Mode | SRAM, JTAG/AS/PS support | — |
| Thermal Resistance (theta_JA) | 31 C/W (with soldered exposed pad) | — |
| Logic Elements (LEs) | — | 24,624 |
| Embedded Memory (bits) | — | 608,256 |
| Memory Blocks | — | M9K blocks, 76 total |
| 18x18 Hardware Multipliers | — | 156 |
| User I/O Count | — | 76 |
| Logic Array Blocks (LABs) | — | 1,539 |
| Global Clocks | — | 20 |
| Core Voltage | — | 1.0 V (typical) |
| Process Node | — | 60 nm low-power CMOS |
| Speed Grade | — | 6 (fastest commercial) |
| Lead-Free / RoHS | — | Compliant |
| Configuration Scheme | — | SRAM-based, via JTAG / Active Serial / Active Parallel |