10CL025YE144I7G vs 10CL025YE144C6G Comparaison
Comparaison détaillée côte à côte de 10CL025YE144I7G par Intel et 10CL025YE144C6G par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10CL025YE144I7G | 10CL025YE144C6G |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $35,80 | $21,89 |
| Series | Cyclone® 10 LP | Cyclone 10 LP |
| Family | Cyclone 10 LP FPGA | Cyclone 10 LP Field Programmable Gate Array |
| Logic Elements (LE) | 24,624 (25K) | — |
| Embedded Memory | 594 Kbits (M9K blocks) | — |
| Embedded Multipliers | 66 (18x18 DSP blocks) | — |
| PLLs | 4 | 4 |
| Maximum User I/O | 246 (family max); 76 in this 144-EQFP | — |
| User I/O Pins (this package) | 76 | — |
| Boîtier | 144-EQFP (EQFP-144) with exposed thermal pad | 144-LQFP Exposed Pad (EQFP-144), 22x22 mm |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40C to +100C (industrial, I7 grade) | 0C to +85C (commercial) |
| Supply Voltage - Core | 1.2 V | — |
| Supply Voltage - I/O | 1.2 V to 3.3 V | — |
| Process Technology | 60 nm TSMC low-power | — |
| Statut RoHS | Compliant (lead-free, 'Y' suffix) | — |
| Configuration Mode | SRAM, JTAG/AS/PS support | — |
| Thermal Resistance (theta_JA) | 31 C/W (with soldered exposed pad) | — |
| Logic Elements (LEs) | — | 24,624 |
| Embedded Memory (bits) | — | 608,256 |
| Memory Blocks | — | M9K blocks, 76 total |
| 18x18 Hardware Multipliers | — | 156 |
| User I/O Count | — | 76 |
| Logic Array Blocks (LABs) | — | 1,539 |
| Global Clocks | — | 20 |
| Core Voltage | — | 1.0 V (typical) |
| Process Node | — | 60 nm low-power CMOS |
| Speed Grade | — | 6 (fastest commercial) |
| Lead-Free / RoHS | — | Compliant |
| Configuration Scheme | — | SRAM-based, via JTAG / Active Serial / Active Parallel |