10M08SAE144I7G vs 10M08SAE144C8G Comparación
Comparación detallada lado a lado de 10M08SAE144I7G por Intel y 10M08SAE144C8G por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
10M08SAE144C8G - MAX 10 FPGA 8K LE, 144-EQFP | Intel | Industrial Control
10M08SAE144C8G ✓ ActivoComparación de especificaciones
| Parámetro | 10M08SAE144I7G | 10M08SAE144C8G |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,80 | $16,25 |
| Family | MAX 10 | MAX 10 |
| Logic Elements (LE) | 8000 | 8000 |
| Total RAM Bits | 387072 (378 Kb) | — |
| User Flash Memory | 1540 Kb (dual-configuration) | — |
| User I/O Pins | 101 | 101 |
| Tensión de alimentación | 2.85 V to 3.465 V | — |
| Core Voltage | 3.3 V (single supply) | — |
| Temperatura de funcionamiento | -40°C to +100°C (TJ) | — |
| Tipo de montaje | Surface Mount | Surface Mount (LQFP) |
| Encapsulado | 144-LQFP Exposed Pad (EQFP-144) | 144-LQFP Exposed Pad (EQFP) |
| Supplier Device Package | 144-EQFP EP | — |
| Process Technology | TSMC 55 nm CMOS | 55 nm flash-based CMOS |
| Embedded Memory Type | M9K SRAM blocks | — |
| Multipliers (18x18) | [DATA_NEEDED: multiplier block count] | — |
| Integrated ADC | Yes, 12-bit SAR | 12-bit, 1 MSa/s, up to 17 analog inputs |
| Configuration Method | JTAG / internal flash (instant-on) | — |
| Soft Core Support | Nios II | — |
| Estado RoHS | Compliant | Compliant |
| Nivel MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Adaptive Logic Modules (ALM) | — | Not applicable (MAX 10 uses LE architecture, not ALM) |
| M9K Embedded Memory Blocks | — | 378 Kb total |
| MLAB Memory | — | [DATA_NEEDED: MLAB capacity] |
| Embedded 18x18 Multipliers | — | 24 |
| Configuration Memory | — | Internal flash, dual-image |
| PLLs | — | 2 analog front-end PLLs |
| Maximum User I/O Voltage | — | 3.3 V (LVCMOS/LVTTL); LVDS supported |
| External Memory Interface | — | DDR3, DDR2, LPDDR2 |
| Temperatura de unión de funcionamiento | — | 0C to 85C (commercial) |
| Lead-Free | — | Yes |
| Sin halógenos | — | [DATA_NEEDED: halogen status] |