27C512-25 vs 27C512-10 Comparación
Comparación detallada lado a lado de 27C512-25 por Microchip Technology y 27C512-10 por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Texas Instruments
27C512-10 - 512Kbit (64Kx8) 100ns CMOS EPROM | Texas Instruments
27C512-10 ✗ Fin de vidaComparación de especificaciones
| Parámetro | 27C512-25 | 27C512-10 |
|---|---|---|
| Marca | Microchip Technology | Texas Instruments |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Fin de vida |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3,20 | $2,70 |
| Memory Organization | 64K x 8 (524,288 bits) | — |
| Tipo de memoria | CMOS EPROM (UV / OTP) | OTP EPROM (CMOS) |
| Maximum Access Time | 250 ns | — |
| Supply Voltage (Read Mode) | 5 V +/- 10% | — |
| Standby Current (CMOS) | 20 uA typical | — |
| Operating Mode | Asynchronous | Totally static operation |
| Tipo de salida | 3-state, common I/O | — |
| Pinout Standard | JEDEC-approved 28-pin | JEDEC-approved 28-pin EPROM pinout |
| Encapsulado | DIP-28 | 28-pin DIP |
| Tipo de montaje | Through Hole | Through Hole |
| Programming Method | High-voltage EPROM programming (Flashrite type) | — |
| Erase Method | UV (windowed variant) or not erasable (OTP variant) | One-Time Programmable (not erasable) |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Access Time Guarantee | Any byte in less than 250 ns | — |
| Technology | CMOS floating gate | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Tamaño de memoria | — | 512 Kbit |
| Organización de memoria | — | 64K x 8 |
| Access Time (Speed Grade -10) | — | 100 ns |
| Supply Voltage (VCC) | — | +5 V with +/-10% tolerance |
| Programming Voltage (VPP) | — | +12.5 V |
| Standby Current | — | 20 uA typical (CMOS standby) |
| Interfaz | — | Parallel, TTL compatible |
| Address Lines | — | 15 (A0-A14) |
| Data Lines | — | 8 (Q0-Q7), tri-state outputs |
| Control Signals | — | /E (chip enable), /G (output enable) |