27C512-25 vs 27C512-10 Comparaison
Comparaison détaillée côte à côte de 27C512-25 par Microchip Technology et 27C512-10 par Texas Instruments. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Texas Instruments
27C512-10 - 512Kbit (64Kx8) 100ns CMOS EPROM | Texas Instruments
27C512-10 ✗ Fin de vieComparaison des spécifications
| Paramètre | 27C512-25 | 27C512-10 |
|---|---|---|
| Marque | Microchip Technology | Texas Instruments |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | Fin de vie |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3,20 | $2,70 |
| Memory Organization | 64K x 8 (524,288 bits) | — |
| Type de mémoire | CMOS EPROM (UV / OTP) | OTP EPROM (CMOS) |
| Maximum Access Time | 250 ns | — |
| Supply Voltage (Read Mode) | 5 V +/- 10% | — |
| Standby Current (CMOS) | 20 uA typical | — |
| Operating Mode | Asynchronous | Totally static operation |
| Type de sortie | 3-state, common I/O | — |
| Pinout Standard | JEDEC-approved 28-pin | JEDEC-approved 28-pin EPROM pinout |
| Boîtier | DIP-28 | 28-pin DIP |
| Type de montage | Through Hole | Through Hole |
| Programming Method | High-voltage EPROM programming (Flashrite type) | — |
| Erase Method | UV (windowed variant) or not erasable (OTP variant) | One-Time Programmable (not erasable) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Access Time Guarantee | Any byte in less than 250 ns | — |
| Technology | CMOS floating gate | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Taille de mémoire | — | 512 Kbit |
| Organisation de la mémoire | — | 64K x 8 |
| Access Time (Speed Grade -10) | — | 100 ns |
| Supply Voltage (VCC) | — | +5 V with +/-10% tolerance |
| Programming Voltage (VPP) | — | +12.5 V |
| Standby Current | — | 20 uA typical (CMOS standby) |
| Interface | — | Parallel, TTL compatible |
| Address Lines | — | 15 (A0-A14) |
| Data Lines | — | 8 (Q0-Q7), tri-state outputs |
| Control Signals | — | /E (chip enable), /G (output enable) |