5CSEBA2U23A7N vs 5CSEBA4U19A7N Comparación
Comparación detallada lado a lado de 5CSEBA2U23A7N por Intel y 5CSEBA4U19A7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5CSEBA2U23A7N | 5CSEBA4U19A7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $99,50 | $99,90 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| MPN Code | 5CSEBA2U23A7N (Cyclone V SE A2, U23 package) | — |
| Logic Elements | 25,000 LE | 40 K |
| Hard Processor System (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 700 MHz | — |
| Process Technology | 28 nm low-power | — |
| User I/O | 188 | 161 |
| Encapsulado | 672-UBGA (23x23 mm) | 484-UBGA (U19), 19x19 mm, 1.0 mm pitch |
| Speed Grade | 7 | — |
| Temperature Grade | A (Commercial, 0C to +85C) [DATA_NEEDED: exact junction range] | — |
| Estado RoHS | Compliant (per ampheo listing) | Compliant |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Nivel MSL | [DATA_NEEDED: MSL level] | 3 (168 hours) |
| Operating Voltage (Core) | 1.1 V (typical FPGA core, multi-rail HPS) | — |
| Configuration Scheme | HPS-boot of FPGA fabric via configuration QSPI | — |
| Embedded Memory | M10K blocks (count [DATA_NEEDED: exact M10K/M20K count]) | 3.4 Mbits (M9K) |
| DSP Blocks | Variable-precision DSP (count [DATA_NEEDED: exact count]) | — |
| PLLs | Fractional PLLs (count [DATA_NEEDED: exact PLL count]) | [DATA_NEEDED: PLL count] |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Adaptive Logic Modules | — | [DATA_NEEDED: ALM count] |
| DSP Blocks (18x18 Multipliers) | — | 224 |
| HPS Maximum Application Clock | — | 925 MHz |
| Memory Interfaces | — | DDR3, DDR3L, LPDDR2 (via HPS); soft DDR3/2 in FPGA |
| Temperatura de unión de funcionamiento | — | -40C to +125C (automotive) / -40C to +100C (industrial) |
| Process Node | — | TSMC 28 nm low-power |
| Core Voltage | — | 1.1 V (typical) |