5CSEBA5U19C8SN vs 5CSEBA5U19C7N Comparación
Comparación detallada lado a lado de 5CSEBA5U19C8SN por Intel y 5CSEBA5U19C7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5CSEBA5U19C8SN | 5CSEBA5U19C7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $162,00 | $99,20 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Device Variant | 5CSEBA5 (U19 package) | — |
| Logic Elements | 85 K | 85,000 |
| Hard Processor System | Single-core ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | 600 MHz | 800 MHz per core |
| Process Technology | TSMC 28 nm low-power | — |
| Embedded Memory | [DATA_NEEDED: total Kbits] | M10K + MLAB blocks, ~4,450 Kbits total |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP count] | Variable-precision, 18x18 / 27x27 multipliers |
| Hard Memory Controller | DDR2 / DDR3 / LPDDR2 | — |
| Core Voltage | 1.1 V | — |
| Encapsulado | 484-pin UFBGA (U19, 19x19 mm) | 484-UBGA (UBGAmobile, 19x19 mm) |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Temperatura de funcionamiento | 0C to +85C (commercial) | 0C to +85C (commercial, junction) |
| Nivel MSL | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020, reflow 260C) |
| Estado RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Configuration Method | Serial / Parallel flash, JTAG | — |
| Speed Grade | — | -7 (standard) |
| Process Node | — | 28 nm low-power (TSMC) |
| Supply Voltage (Core) | — | 1.1 V typical |
| HPS Peripherals | — | EMAC, USB 2.0 OTG, NAND, DDR3, SPI, QSPI, I2C, UART |
| RoHS / Pb-free | — | Yes |
| Configuration Memory | — | External (active serial via HPS or FPGA) |
| Block Pins (User I/O) | — | Approximately 66 user I/O pins |