5CSEBA5U19C8SN vs 5CSEBA5U19C7N Comparaison
Comparaison détaillée côte à côte de 5CSEBA5U19C8SN par Intel et 5CSEBA5U19C7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 5CSEBA5U19C8SN | 5CSEBA5U19C7N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $162,00 | $99,20 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Device Variant | 5CSEBA5 (U19 package) | — |
| Logic Elements | 85 K | 85,000 |
| Hard Processor System | Single-core ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | 600 MHz | 800 MHz per core |
| Process Technology | TSMC 28 nm low-power | — |
| Embedded Memory | [DATA_NEEDED: total Kbits] | M10K + MLAB blocks, ~4,450 Kbits total |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP count] | Variable-precision, 18x18 / 27x27 multipliers |
| Hard Memory Controller | DDR2 / DDR3 / LPDDR2 | — |
| Core Voltage | 1.1 V | — |
| Boîtier | 484-pin UFBGA (U19, 19x19 mm) | 484-UBGA (UBGAmobile, 19x19 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Température de fonctionnement | 0C to +85C (commercial) | 0C to +85C (commercial, junction) |
| Niveau MSL | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020, reflow 260C) |
| Statut RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Configuration Method | Serial / Parallel flash, JTAG | — |
| Speed Grade | — | -7 (standard) |
| Process Node | — | 28 nm low-power (TSMC) |
| Supply Voltage (Core) | — | 1.1 V typical |
| HPS Peripherals | — | EMAC, USB 2.0 OTG, NAND, DDR3, SPI, QSPI, I2C, UART |
| RoHS / Pb-free | — | Yes |
| Configuration Memory | — | External (active serial via HPS or FPGA) |
| Block Pins (User I/O) | — | Approximately 66 user I/O pins |