5CSEBA6U19I7SN vs 5CSEBA4U19I7SN Comparación
Comparación detallada lado a lado de 5CSEBA6U19I7SN por Intel y 5CSEBA4U19I7SN por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5CSEBA6U19I7SN | 5CSEBA4U19I7SN |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $305,00 | $145,00 |
| Family | Cyclone V SE SoC FPGA | — |
| Hard Processor System (HPS) | Single-core ARM Cortex-A9 MPCore with CoreSight | Single ARM Cortex-A9 MPCore with CoreSight |
| Logic Elements (LEs) | 110,000 | — |
| Logic Array Blocks (LABs) | 4150 | — |
| Maximum User I/Os | 66 | — |
| On-chip Memory | 64 KB | — |
| DSP Blocks | Variable-precision DSP blocks | — |
| PLLs | Integrated phase-locked loops | [DATA_NEEDED: count] |
| HPS Maximum Frequency | 800 MHz | 800 MHz |
| External Memory Support | DDR3, DDR3L, LPDDR2 (via HPS) | — |
| Process Technology | 28 nm low-power (TSMC) | — |
| Encapsulado | 484-pin UBGA (19x19 mm) | 484-pin UBG A (19x19 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | Industrial grade (I) -40C to +100C junction | -40C to +100C (Industrial) |
| Estado RoHS | Compliant | Compliant |
| Lead Free | Yes | — |
| Ordering Part Number | 5CSEBA6U19I7SN | — |
| Series | — | Cyclone V SE SoC FPGA |
| Device Family | — | Cyclone V |
| Logic Elements | — | 40,000 |
| Process Node | — | 28 nm low-power |
| Supply Voltage (Core) | — | 1.1 V (typical) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL (Cyclone V I/O family) |
| Embedded Memory | — | [DATA_NEEDED: total Kbits of M9K blocks] |
| 18x18 Hardware Multipliers | — | [DATA_NEEDED: count] |
| Transceivers | — | Not applicable (SE family, transceiver-less) |
| PCI Express Hard IP | — | Gen1 capable (rootport/endpoint) |
| DDR Memory Support | — | DDR2/DDR3/LPDDR2 via HPS and FPGA fabric |