5CSEBA6U19I7SN vs 5CSEBA4U19I7SN Comparaison
Comparaison détaillée côte à côte de 5CSEBA6U19I7SN par Intel et 5CSEBA4U19I7SN par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 5CSEBA6U19I7SN | 5CSEBA4U19I7SN |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $305,00 | $145,00 |
| Family | Cyclone V SE SoC FPGA | — |
| Hard Processor System (HPS) | Single-core ARM Cortex-A9 MPCore with CoreSight | Single ARM Cortex-A9 MPCore with CoreSight |
| Logic Elements (LEs) | 110,000 | — |
| Logic Array Blocks (LABs) | 4150 | — |
| Maximum User I/Os | 66 | — |
| On-chip Memory | 64 KB | — |
| DSP Blocks | Variable-precision DSP blocks | — |
| PLLs | Integrated phase-locked loops | [DATA_NEEDED: count] |
| HPS Maximum Frequency | 800 MHz | 800 MHz |
| External Memory Support | DDR3, DDR3L, LPDDR2 (via HPS) | — |
| Process Technology | 28 nm low-power (TSMC) | — |
| Boîtier | 484-pin UBGA (19x19 mm) | 484-pin UBG A (19x19 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | Industrial grade (I) -40C to +100C junction | -40C to +100C (Industrial) |
| Statut RoHS | Compliant | Compliant |
| Lead Free | Yes | — |
| Ordering Part Number | 5CSEBA6U19I7SN | — |
| Series | — | Cyclone V SE SoC FPGA |
| Device Family | — | Cyclone V |
| Logic Elements | — | 40,000 |
| Process Node | — | 28 nm low-power |
| Supply Voltage (Core) | — | 1.1 V (typical) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL (Cyclone V I/O family) |
| Embedded Memory | — | [DATA_NEEDED: total Kbits of M9K blocks] |
| 18x18 Hardware Multipliers | — | [DATA_NEEDED: count] |
| Transceivers | — | Not applicable (SE family, transceiver-less) |
| PCI Express Hard IP | — | Gen1 capable (rootport/endpoint) |
| DDR Memory Support | — | DDR2/DDR3/LPDDR2 via HPS and FPGA fabric |