5M40ZM64C4 vs 5M40ZM64C4N Comparación
Comparación detallada lado a lado de 5M40ZM64C4 por Altera y 5M40ZM64C4N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5M40ZM64C4 | 5M40ZM64C4N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3,85 | $0,48 |
| Family | MAX V | MAX V |
| Logic Elements (LEs) | 40 | — |
| Macrocells | 32 | — |
| Logic Array Blocks (LABs) | 2 | — |
| Maximum User I/O Pins | 30 (52 device max) | — |
| Maximum Frequency (fMAX) | 184.1 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V (internal) | — |
| I/O Voltage (VCCIO) | 1.2 V to 3.3 V | — |
| Embedded Memory (UFM) | 8 Kbits | — |
| Encapsulado | 64-ball MBGA (Micro BGA), 0.5 mm pitch | 64-MBGA (Micro FineLine BGA), 4.5 x 4.5 mm |
| Temperatura de funcionamiento | 0 °C to +85 °C (Commercial, C4 speed grade) | 0 °C to +85 °C (commercial) |
| Programming | JTAG (IEEE 1149.1), internal flash non-volatile | — |
| Estado RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Logic Elements | — | 40 |
| Macro Cells | — | 32 |
| Number of I/O Pins | — | 30 (max user I/O) |
| Number of Logic Array Blocks | — | 2 LABs (16 macrocells each) |
| Core Voltage VCCINT | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Voltage VCCIO | — | 1.2 V to 3.3 V (multi-voltage) |
| Maximum Internal Frequency | — | 184.1 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 7.5 ns |
| Propagation Delay (max) | — | 7.5 ns |
| Tipo de montaje | — | Surface Mount (BGA) |
| Configuration Memory | — | Flash (non-volatile, instant-on) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |