5M40ZM64I5 vs 5M40ZM64C4N Comparación
Comparación detallada lado a lado de 5M40ZM64I5 por Intel y 5M40ZM64C4N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5M40ZM64I5 | 5M40ZM64C4N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4,05 | $0,48 |
| Family | MAX V | MAX V |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 32 | 32 |
| Logic Elements | 40 | 40 |
| Maximum Internal Frequency | 118.3 MHz | 184.1 MHz |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | 7.5 ns |
| Core Supply Voltage | 1.8 V | — |
| User I/O Count | [DATA_NEEDED: exact user I/O count] | — |
| Rango de temperatura de funcionamiento | -40C to +100C (Industrial, 'I' suffix) | — |
| Package Type | MBGA-64 (Micro BGA, 64-ball) | — |
| Package Code | TFBGA / MBGA, 0.5 mm pitch | — |
| Package Shape | Square | — |
| Configuration Memory | On-chip Flash (non-volatile) | Flash (non-volatile, instant-on) |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Number of I/O Pins | — | 30 (max user I/O) |
| Number of Logic Array Blocks | — | 2 LABs (16 macrocells each) |
| Core Voltage VCCINT | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Voltage VCCIO | — | 1.2 V to 3.3 V (multi-voltage) |
| Propagation Delay (max) | — | 7.5 ns |
| Temperatura de funcionamiento | — | 0 °C to +85 °C (commercial) |
| Encapsulado | — | 64-MBGA (Micro FineLine BGA), 4.5 x 4.5 mm |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |