5M40ZM64I5N vs 5M40ZM64C4N Comparación
Comparación detallada lado a lado de 5M40ZM64I5N por Intel y 5M40ZM64C4N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5M40ZM64I5N | 5M40ZM64C4N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2,45 | $0,48 |
| Device Family | MAX V | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements | 40 | 40 |
| Macrocells | 32 | — |
| User I/Os | 30 | — |
| Internal Frequency | 118 MHz | — |
| Propagation Delay (tPD) | 14 ns | — |
| Core Voltage | 1.6 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (multi-voltage I/O) | — |
| Encapsulado | MBGA-64, 4.50 x 4.50 mm, 0.50 mm pitch | 64-MBGA (Micro FineLine BGA), 4.5 x 4.5 mm |
| Recuento de pines | 64 | — |
| Temperatura de funcionamiento | -40C to +100C (industrial) | 0 °C to +85 °C (commercial) |
| Programming Interface | JTAG IEEE 1149.1 (in-system programmable) | JTAG (IEEE 1149.1) / ISP |
| Non-volatile Configuration | Yes (flash-based, instant-on) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Nivel MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Family | — | MAX V |
| Macro Cells | — | 32 |
| Number of I/O Pins | — | 30 (max user I/O) |
| Number of Logic Array Blocks | — | 2 LABs (16 macrocells each) |
| Core Voltage VCCINT | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Voltage VCCIO | — | 1.2 V to 3.3 V (multi-voltage) |
| Maximum Internal Frequency | — | 184.1 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 7.5 ns |
| Propagation Delay (max) | — | 7.5 ns |
| Tipo de montaje | — | Surface Mount (BGA) |
| Configuration Memory | — | Flash (non-volatile, instant-on) |