5M80ZM68C5N vs 5M240ZM68C5N Comparación
Comparación detallada lado a lado de 5M80ZM68C5N por Intel y 5M240ZM68C5N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5M80ZM68C5N | 5M240ZM68C5N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1,74 | $9,05 |
| Family | MAX V | MAX V (5M240Z) |
| Logic Elements | 64 | 240 |
| Macrocells | 64 | — |
| Maximum User I/O | 79 | — |
| Pin-to-Pin Delay (Tpd) | 7.5 ns | — |
| Internal Operating Frequency | 300 MHz (max) | — |
| Encapsulado | 68-ball MBGA (Micro FineLine BGA), 5x5 mm | 68-ball Micro FBGA (BGA-68) |
| Core Voltage | 1.8 V | — |
| I/O Bank Voltages | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory | 8 Kbits | Yes (integrated) |
| Temperatura de funcionamiento | 0 °C to +85 °C (commercial, C5) | 0 °C to +85 °C (commercial) |
| Configuration Memory | Non-volatile flash (zero boot time) | — |
| Programming Interface | JTAG (IEEE 1149.1) in-system programmable | JTAG (IEEE 1149.1) |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Estado RoHS | Compliant | Compliant |
| Series | — | MAX V |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Architecture | — | Non-volatile flash-based |
| Macro Cells | — | 192 |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum Operating Frequency | — | 118.3 MHz |
| Core Supply Voltage | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Banks | — | MultiVolt I/O, 1.5/1.8/2.5/3.3 V compatible |
| Global Clocks | — | 4 |