A42MX16-PQ100 vs A42MX16-PQ100IX39 Comparación
Comparación detallada lado a lado de A42MX16-PQ100 por Microchip Technology y A42MX16-PQ100IX39 por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
A42MX16-PQ100IX39 - 24K Gate MX FPGA | Microchip | 100-Pin PQFP
A42MX16-PQ100IX39 ✓ ActivoComparación de especificaciones
| Parámetro | A42MX16-PQ100 | A42MX16-PQ100IX39 |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1,00 | $31,90 |
| Family | 42MX (Actel MX) | MX (40MX and 42MX) |
| Logic Gates | 24K gates (up to 54,000 system gates) | — |
| Logic Cells | 608 | 1232 |
| System Frequency | 103 MHz / 172 MHz | — |
| Process Technology | 0.45 um | — |
| Tensión de alimentación | 3.3 V / 5 V | 5.0 V |
| Embedded SRAM | 2.5 kbits configurable dual-port | — |
| Programming Technology | Antifuse (one-time programmable, non-volatile) | — |
| User I/O (PQ100 package) | 83 | — |
| Maximum User I/O (device) | Up to 202 | — |
| Pin Locking | 100% pin locking | — |
| Encapsulado | 100-PQFP (BQFP), surface mount | 100-pin PQFP |
| Tipo de montaje | Surface Mount | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Boundary Scan | Yes (JTAG boundary-scan register chain, TDI to TDO) | — |
| Equivalent System Gates | — | 24000 |
| Configurable Logic Blocks (CLBs) | — | 608 |
| User I/O Pins | — | 83 |
| Frecuencia de reloj máxima | — | 56 MHz |
| Rango de temperatura de funcionamiento | — | -40°C to +85°C (industrial) |
| Terminal Pitch | — | 0.635 mm |
| PCI Compliance | — | PCI Local Bus Specification version 2.1 |
| On-Chip Operation | — | 200 MHz |
| Clock-to-Output | — | 6.1 ns |
| JTAG Boundary Scan | — | IEEE Standard 1149.1 |
| Configuration | — | Antifuse (non-volatile) |