A54SX72A-FGG256 vs A54SX72A-FFGG256 Comparación
Comparación detallada lado a lado de A54SX72A-FGG256 por Microchip Technology y A54SX72A-FFGG256 por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
A54SX72A-FGG256 - 108K Gate Antifuse FPGA, 256-FBGA | Microchip
A54SX72A-FGG256 ✓ ActivoMicrochip Technology
A54SX72A-FFGG256 - 108K Gate Antifuse FPGA, 256-BGA | Microchip
A54SX72A-FFGG256 ✓ ActivoComparación de especificaciones
| Parámetro | A54SX72A-FGG256 | A54SX72A-FFGG256 |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $153,34 | $65,80 |
| Family | SX-A (Antifuse FPGA) | SX-A (Antifuse FPGA) |
| System Gates | 108,000 gates | 108,000 |
| Typical Usable Gates | 72,000 gates | — |
| Logic Cells | 6,036 cells | — |
| User I/O | 203 | — |
| Tensión de alimentación | 2.5 V | 2.25 V to 2.75 V (nominal 2.5 V) |
| Technology | 0.25 um CMOS antifuse | — |
| Maximum Toggle Frequency | 217 MHz | — |
| Encapsulado | 256-ball FBGA (FGG256), 1.0 mm pitch | 256-BGA (FBGA-256, 1.0 mm pitch) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Type | One-time programmable (antifuse), nonvolatile | — |
| Configuration Memory | Not required (nonvolatile) | — |
| Clock Networks | CLKA, CLKB, QCLK quadrant clocks plus hard-wired global clocks | — |
| Lead Free | Yes (per distributor data) | — |
| Estado RoHS | Compliant | Compliant |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +70C |
| Nivel MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Typical Gates | — | 72,000 |
| Configurable Logic Blocks (CLBs) | — | 6,036 |
| Number of I/O | — | 203 |
| Frecuencia de reloj máxima | — | 172 MHz |
| Combinatorial CLB Delay | — | 1.8 ns (typical) |
| Process Technology | — | 0.25 um CMOS |
| Programmability | — | One-Time Programmable (antifuse) |
| Speed Grade | — | Standard (FF) |
| Packaging | — | Tray |
| Lead Free Status | — | Lead Free |