A54SX72A-FGG256 vs A54SX72A-FFGG256 Comparaison
Comparaison détaillée côte à côte de A54SX72A-FGG256 par Microchip Technology et A54SX72A-FFGG256 par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A54SX72A-FGG256 - 108K Gate Antifuse FPGA, 256-FBGA | Microchip
A54SX72A-FGG256 ✓ ActifMicrochip Technology
A54SX72A-FFGG256 - 108K Gate Antifuse FPGA, 256-BGA | Microchip
A54SX72A-FFGG256 ✓ ActifComparaison des spécifications
| Paramètre | A54SX72A-FGG256 | A54SX72A-FFGG256 |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $153,34 | $65,80 |
| Family | SX-A (Antifuse FPGA) | SX-A (Antifuse FPGA) |
| System Gates | 108,000 gates | 108,000 |
| Typical Usable Gates | 72,000 gates | — |
| Logic Cells | 6,036 cells | — |
| User I/O | 203 | — |
| Tension d'alimentation | 2.5 V | 2.25 V to 2.75 V (nominal 2.5 V) |
| Technology | 0.25 um CMOS antifuse | — |
| Maximum Toggle Frequency | 217 MHz | — |
| Boîtier | 256-ball FBGA (FGG256), 1.0 mm pitch | 256-BGA (FBGA-256, 1.0 mm pitch) |
| Type de montage | Surface Mount | Surface Mount |
| Programming Type | One-time programmable (antifuse), nonvolatile | — |
| Configuration Memory | Not required (nonvolatile) | — |
| Clock Networks | CLKA, CLKB, QCLK quadrant clocks plus hard-wired global clocks | — |
| Lead Free | Yes (per distributor data) | — |
| Statut RoHS | Compliant | Compliant |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0C to +70C |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Typical Gates | — | 72,000 |
| Configurable Logic Blocks (CLBs) | — | 6,036 |
| Number of I/O | — | 203 |
| Fréquence d'horloge maximale | — | 172 MHz |
| Combinatorial CLB Delay | — | 1.8 ns (typical) |
| Process Technology | — | 0.25 um CMOS |
| Programmability | — | One-Time Programmable (antifuse) |
| Speed Grade | — | Standard (FF) |
| Packaging | — | Tray |
| Lead Free Status | — | Lead Free |