A54SX72A-PQG208 vs A54SX72A-1PQG208M Comparación
Comparación detallada lado a lado de A54SX72A-PQG208 por Microchip Technology y A54SX72A-1PQG208M por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
A54SX72A-PQG208 - 108K Gate SX-A Antifuse FPGA | Microchip
A54SX72A-PQG208 ✗ Fin de vidaMicrochip Technology
A54SX72A-1PQG208M - 108K-Gate Antifuse FPGA, 208-PQFP | Microchip
A54SX72A-1PQG208M ✓ ActivoComparación de especificaciones
| Parámetro | A54SX72A-PQG208 | A54SX72A-1PQG208M |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Fin de vida | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $181,30 | $138,75 |
| Family | SX-A (Antifuse FPGA) | SX-A (Antifuse FPGA) |
| System Gates | 108,000 | 108000 |
| User-Programmable I/O (this package) | 171 | — |
| Max User I/O (family) | 360 | — |
| Dedicated Flip-Flops | 2,012 | — |
| Process Technology | 0.25 um CMOS | — |
| Internal Performance | up to 217 MHz | — |
| Programming Technology | Antifuse (one-time programmable) | — |
| Encapsulado | 208-BFQFP (PQG208) | 208-BFQFP (208-PQFP), surface mount |
| Tipo de montaje | Surface Mount | Surface Mount |
| I/O Standards | TTL, LVTTL, LVCMOS2, 3.3V PCI, 5V PCI | TTL, LVTTL, LVCMOS2, 3.3 V PCI, 5.0 V PCI |
| Clock Inputs | 4 quadrant clock inputs (CLKA-CLKD) | — |
| Core Supply Voltage | [DATA_NEEDED: Core Supply Voltage] | 2.5 V |
| I/O Supply Voltage | [DATA_NEEDED: I/O Supply Voltage] | — |
| Temperatura de funcionamiento | [DATA_NEEDED: Operating Temperature] | [DATA_NEEDED: Operating Temperature] |
| Estado del ciclo de vida | Discontinued (EOL December 2025 per OnlineComponents) | — |
| Estado RoHS | [DATA_NEEDED: RoHS Status] | Lead Free (per DigiKey/Jake Electronics listing: LEAD FREE) |
| Typical Gates | — | 72000 |
| Configurable Logic Blocks (CLBs) | — | 6036 |
| User I/O | — | 171 |
| Speed Grade | — | -1 |
| Maximum System Clock Frequency | — | 250 MHz (device family maximum) |
| Technology | — | 0.25 um / 0.22 um CMOS |
| Programming Type | — | One-Time Programmable (Antifuse) |
| Clock Networks | — | 4 quadrant clock inputs (CLKA-CLKD) + global clock network |
| Configuration Storage | — | Non-volatile (no external configuration PROM required) |