A54SX72A-PQG208 vs A54SX72A-1PQG208M Comparaison
Comparaison détaillée côte à côte de A54SX72A-PQG208 par Microchip Technology et A54SX72A-1PQG208M par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A54SX72A-PQG208 - 108K Gate SX-A Antifuse FPGA | Microchip
A54SX72A-PQG208 ✗ Fin de vieMicrochip Technology
A54SX72A-1PQG208M - 108K-Gate Antifuse FPGA, 208-PQFP | Microchip
A54SX72A-1PQG208M ✓ ActifComparaison des spécifications
| Paramètre | A54SX72A-PQG208 | A54SX72A-1PQG208M |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Fin de vie | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $181,30 | $138,75 |
| Family | SX-A (Antifuse FPGA) | SX-A (Antifuse FPGA) |
| System Gates | 108,000 | 108000 |
| User-Programmable I/O (this package) | 171 | — |
| Max User I/O (family) | 360 | — |
| Dedicated Flip-Flops | 2,012 | — |
| Process Technology | 0.25 um CMOS | — |
| Internal Performance | up to 217 MHz | — |
| Programming Technology | Antifuse (one-time programmable) | — |
| Boîtier | 208-BFQFP (PQG208) | 208-BFQFP (208-PQFP), surface mount |
| Type de montage | Surface Mount | Surface Mount |
| I/O Standards | TTL, LVTTL, LVCMOS2, 3.3V PCI, 5V PCI | TTL, LVTTL, LVCMOS2, 3.3 V PCI, 5.0 V PCI |
| Clock Inputs | 4 quadrant clock inputs (CLKA-CLKD) | — |
| Core Supply Voltage | [DATA_NEEDED: Core Supply Voltage] | 2.5 V |
| I/O Supply Voltage | [DATA_NEEDED: I/O Supply Voltage] | — |
| Température de fonctionnement | [DATA_NEEDED: Operating Temperature] | [DATA_NEEDED: Operating Temperature] |
| Statut du cycle de vie | Discontinued (EOL December 2025 per OnlineComponents) | — |
| Statut RoHS | [DATA_NEEDED: RoHS Status] | Lead Free (per DigiKey/Jake Electronics listing: LEAD FREE) |
| Typical Gates | — | 72000 |
| Configurable Logic Blocks (CLBs) | — | 6036 |
| User I/O | — | 171 |
| Speed Grade | — | -1 |
| Maximum System Clock Frequency | — | 250 MHz (device family maximum) |
| Technology | — | 0.25 um / 0.22 um CMOS |
| Programming Type | — | One-Time Programmable (Antifuse) |
| Clock Networks | — | 4 quadrant clock inputs (CLKA-CLKD) + global clock network |
| Configuration Storage | — | Non-volatile (no external configuration PROM required) |