ATF16V8B-10SI vs ATF16V8B-15PU Comparación

Comparación detallada lado a lado de ATF16V8B-10SI por Microchip Technology y ATF16V8B-15PU por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Microchip Technology
ATF16V8B-10SI ATF16V8B-10SI - 10ns 250-Gate Erasable PLD | Microchip

ATF16V8B-10SI - 10ns 250-Gate Erasable PLD | Microchip

ATF16V8B-10SI ✓ Activo
Microchip Technology
ATF16V8B-15PU ATF16V8B-15PU - 15 ns 8-Macrocell 5V PLD | Microchip

ATF16V8B-15PU - 15 ns 8-Macrocell 5V PLD | Microchip

ATF16V8B-15PU ✓ Activo

Comparación de especificaciones

Parámetro ATF16V8B-10SI ATF16V8B-15PU
Marca Microchip Technology Microchip Technology
Categoría Logic ICs Logic ICs
Estado del ciclo de vida Activo Activo
Device Type Electrically Erasable Programmable Logic Device (PLD) 16V8 electrically erasable programmable logic device
Logic Density 250 gates —
Macrocell Count 8 macrocells —
Maximum Inputs Up to 16 inputs Up to 16 inputs
I/O Count 8 I/Os —
Output Count 8 outputs —
Product Terms per Output 8 product terms 8 product terms
Propagation Delay 10 ns —
Tensión de alimentación 5 V —
Power Class Standard power Standard power
Encapsulado 20-SOIC, 7.50 mm width 20-pin PDIP
Temperature Grade Industrial temperature —
Programming Technology Electrically erasable —
Operating Modes 3 automatically selected modes —
Architecture Compatibility Generic 16R8 and most 20-pin combinatorial PLDs —
Fusemap Compatibility JEDEC fusemap compatible —
Tipo de montaje Surface mount —
Estado RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
REACH Status [DATA_NEEDED: REACH compliance status] [DATA_NEEDED: REACH status]
Architecture — PAL-compatible 20-pin architecture
Macrocells — 8 macrocells
Gate Equivalent Capacity — 250 gates
Propagation Delay Grade — 15 ns
Nominal Supply Voltage — 5 V
User I/O — 8 I/Os
Registered Outputs — 8 outputs
Configuration Technology — Electrically erasable Flash memory
Logic Family — CMOS
Package Suffix — P
Green Package — Green
Programming — Electrically erasable PLD programming
AEC-Q100 Qualification — [DATA_NEEDED: AEC-Q100 qualification]
Rango de temperatura de funcionamiento — [DATA_NEEDED: operating temperature range]

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