ATSAMA5D27A-CUR vs ATSAMA5D27A-CU Comparación
Comparación detallada lado a lado de ATSAMA5D27A-CUR por Microchip Technology y ATSAMA5D27A-CU por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
ATSAMA5D27A-CUR - 500MHz ARM Cortex-A5 MPU | Microchip
ATSAMA5D27A-CUR ✓ ActivoMicrochip Technology
ATSAMA5D27A-CU - 500MHz Cortex-A5 MPU | Microchip | Embedded
ATSAMA5D27A-CU ✓ ActivoComparación de especificaciones
| Parámetro | ATSAMA5D27A-CUR | ATSAMA5D27A-CU |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $12,95 | $7,83 |
| Series | SAMA5D2 | — |
| Core | ARM Cortex-A5 (1 core, 32-bit) | — |
| Maximum CPU Clock | 500 MHz | — |
| Temperatura de funcionamiento | -40 C to +85 C (Industrial, MRLA marking) | -40 °C to +85 °C (industrial) |
| Maximum Junction Temperature | 105 C | — |
| Encapsulado | 289-LFBGA (14x14 mm) | 289-LFBGA (14x14 mm, 0.8 mm pitch) |
| Ball Pitch | 0.8 mm | — |
| External Memory Support | DDR2, DDR3L, LPDDR2, LPDDR3, QSPI, e.MMC | DDR2, DDR3L, LPDDR2, LPDDR3, QSPI, e.MMC, NAND |
| Cache | 32 KB I-cache, 32 KB D-cache | — |
| FPU / NEON | Yes (VFPv4 + NEON) | — |
| AES-OTF (On-The-Fly) | Yes | — |
| CAN-FD Controllers | 2 | — |
| HSIC Interface | Yes | — |
| Peripheral Touch Controller | Yes (PTC) | — |
| Backup Mode Current | 5 uA (typ) | <5 µA |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Packaging | Tape & Reel (TR) | — |
| Nivel MSL | 3 | 3 |
| Estado RoHS | Compliant | Compliant |
| L1 Instruction Cache | 32 KB | — |
| L1 Data Cache | 32 KB | — |
| Embedded Audio Subsystem | Yes (I2S/TDM) | — |
| Core Architecture | — | ARM Cortex-A5 (ARMv7-A) with NEON |
| Operating Frequency | — | 500 MHz |
| Core Count / Data Bus Width | — | 1 Core / 32-bit |
| Internal SRAM | — | 128 KB |
| Tensión de alimentación | — | 3.3 V I/O, 1.2 V core (typ.) |
| Cryptography | — | AES, SHA, TRNG, secure boot |
| Display Interface | — | LCD controller, MIPI-DSI option |
| Touch Controller | — | Integrated Peripheral Touch Controller (PTC) |
| Communication Interfaces | — | CAN, HSIC, USB, EMAC, FLEXCOM x12 (UART/SPI/TWI) |
| Lead-Free | — | Yes |