ATSAMD20E15A-AN vs ATSAMD10D14A-SSNT Comparación
Comparación detallada lado a lado de ATSAMD20E15A-AN por Microchip Technology y ATSAMD10D14A-SSNT por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
ATSAMD20E15A-AN - 32KB Flash ARM Cortex-M0+ MCU | Microchip
ATSAMD20E15A-AN ✓ ActivoMicrochip Technology
ATSAMD10D14A-SSNT - 48MHz Cortex-M0+ MCU 16KB Flash | Microchip
ATSAMD10D14A-SSNT ✓ ActivoComparación de especificaciones
| Parámetro | ATSAMD20E15A-AN | ATSAMD10D14A-SSNT |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1,55 | $1,36 |
| Core Architecture | ARM Cortex-M0+ (32-bit) | — |
| Frecuencia de reloj máxima | 48 MHz | — |
| Flash Memory | 32 KB | — |
| SRAM | 4 KB | 4 KB |
| Supply Voltage Range | 1.62 V to 3.63 V | — |
| Temperatura de funcionamiento | -40 C to +105 C | -40C to +105C |
| CoreMark Performance | 2.14 CoreMark/MHz | — |
| ADC Resolution | 12-bit | — |
| DAC Resolution | 10-bit | — |
| Peripheral Touch Controller | 256 channels | — |
| SERCOM Modules | 6 (configurable UART/SPI/I2C) | 6 (configurable as I2C / SPI / UART) |
| Encapsulado | 32-pin TQFP | 20-pin SOIC (300 mil) |
| Tipo de montaje | Surface Mount | — |
| Estado RoHS | Compliant | Compliant (per Microchip product page) |
| Lead Free | Yes | — |
| Core | — | ARM Cortex-M0+ (32-bit) |
| Maximum CPU Frequency | — | 48 MHz |
| CoreMark/MHz | — | 2.46 |
| Program Flash Memory | — | 16 KB (16K x 8) |
| Supply Voltage (VDD) | — | 1.6 V to 3.6 V |
| GPIO Pins | — | 14 (max, package-dependent) |
| ADC | — | 12-bit SAR, up to 350 kSps, up to 12 channels |
| Timer / Counter | — | 16-bit TCC and TC peripherals |
| PTC (Touch) | — | Peripheral Touch Controller supported |
| Debug Interface | — | Serial Wire Debug (SWD), 2-wire |
| Nivel MSL | — | 1 (per SOIC handling guidelines) |