EP1810GC-35AB vs EP1810GM883B Comparación
Comparación detallada lado a lado de EP1810GC-35AB por Altera y EP1810GM883B por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1810GC-35AB | EP1810GM883B |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,95 | $125,40 |
| Product Family | Classic EPLD | — |
| Technology | CMOS EPROM | CMOS, UV-erasable |
| Number of Macrocells | 48 | — |
| Number of Usable Gates | 1200 | — |
| Maximum Inputs | 64 | — |
| Maximum Outputs | 48 | — |
| Number of I/O Pins | 48 | — |
| Dedicated Input Pins | 12 | — |
| Propagation Delay (tPD) | 35 ns | 50 ns max |
| Maximum Toggle Frequency | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.5 V to 5.5 V |
| Package Type | Pin Grid Array (PGA), ceramic | Ceramic Pin Grid Array (PGA), 84 pins |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -55 °C to +125 °C (Military, MIL-STD-883B) |
| Programming Method | UV-erasable EPROM, in-system via JTAG-like interface | UV-erasable / Altera programming hardware |
| Estado RoHS | unknown | — |
| Device Family | — | EP1810 (Classic EPLD) |
| Macrocells | — | 48 |
| User Flip-Flops | — | Up to 64 |
| Total Inputs | — | 60 |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 48 (bidirectional, tri-state) |
| Package Designator | — | GM (ceramic PGA) |
| Processing Level | — | MIL-STD-883B (Class B) |
| Tipo de montaje | — | Through-hole (PGA socket or PCB through-hole) |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| Logic Family | — | TTL-compatible I/O |