EP1810GI-45 vs EP1810GC-35AB Comparación
Comparación detallada lado a lado de EP1810GI-45 por Altera y EP1810GC-35AB por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1810GI-45 | EP1810GC-35AB |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $56,40 | $9,95 |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | — |
| Family | Altera Classic EPLD | — |
| Macrocells | 24 | — |
| Flip-Flops | 48 | — |
| Propagation Delay (tpd) | 45 ns | — |
| Speed Grade | -45 | — |
| Technology | CMOS | CMOS EPROM |
| Package Type | Ceramic Pin Grid Array with UV window | Pin Grid Array (PGA), ceramic |
| Recuento de pines | 68 | — |
| Tipo de montaje | Through-Hole | — |
| Programmable | Yes (UV-erasable, electrically programmable) | — |
| Estado RoHS | Non-compliant (ceramic PGA) | unknown |
| Lead-Free | No | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Tensión de alimentación | [DATA_NEEDED: VCC range] | — |
| Product Family | — | Classic EPLD |
| Number of Macrocells | — | 48 |
| Number of Usable Gates | — | 1200 |
| Maximum Inputs | — | 64 |
| Maximum Outputs | — | 48 |
| Number of I/O Pins | — | 48 |
| Dedicated Input Pins | — | 12 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Toggle Frequency | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Programming Method | — | UV-erasable EPROM, in-system via JTAG-like interface |