EP1M350F780C6N vs EP1M350F780C8 Comparación
Comparación detallada lado a lado de EP1M350F780C6N por Intel y EP1M350F780C8 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N ⚠ Última compraComparación de especificaciones
| Parámetro | EP1M350F780C6N | EP1M350F780C8 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $219,40 | $175,00 |
| Family | Mercury (EP1M350) | — |
| Device Type | Loadable Programmable Logic Device (PLD) / FPGA | — |
| Logic Family | CMOS, SRAM-based LUT | — |
| System Gates | 350,000 | — |
| Logic Cells / Elements | 14,400 | — |
| User I/Os | 486 | — |
| Integrated Transceivers | Yes, with CDR up to 1.25 Gbps | — |
| Core Supply Voltage | 1.8 V | — |
| Encapsulado | 780-ball FC-FBGA (FINE LINE BGA-780) | 780-ball FineLine BGA |
| Terminal Form | Ball | — |
| Package Code (JEDEC) | S-PBGA-B780 | — |
| Temperatura de funcionamiento | 0 C to 85 C | 0C to +85C (commercial) |
| Configuration Interface | JTAG (IEEE 1149.1) / passive serial | IEEE 1532 / passive serial / JTAG |
| Estado RoHS | [DATA_NEEDED: rohs_status] | unknown (legacy device) |
| Nivel MSL | [DATA_NEEDED: msl_level] | [DATA_NEEDED: MSL rating] |
| Lead-Free | [DATA_NEEDED: lead_free] | — |
| Architecture | Look-up table (LUT)-based, optimized for high-speed serial I/O | — |
| Total Package Pins / Balls | 780 | — |
| Device Family | — | Altera APEX Mercury (EP1M) |
| Typical Gates | — | 350,000 |
| Maximum Logic Elements (LEs) | — | 12,160 |
| Embedded RAM Blocks | — | 4 dual-port RAM blocks |
| Speed Grade | — | C8 (commercial, speed bin 8) |
| Supply Voltage (Core) | — | [DATA_NEEDED: core Vcc] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) |
| Global Clock Networks | — | 8 |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| In-System Programmability | — | Yes (ISP via JTAG) |
| Tipo de montaje | — | Surface Mount (BGA) |