EP1S10F484C7N vs EP1S10F484C6N Comparación
Comparación detallada lado a lado de EP1S10F484C7N por Intel y EP1S10F484C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S10F484C7N | EP1S10F484C6N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $162,00 | $226,31 |
| Family | Stratix (EP1S) | Stratix |
| Manufacturer | Intel (formerly Altera) | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Logic Elements | 10,570 | — |
| Logic Array Blocks (LABs) | 1,057 | — |
| Embedded Memory (Total) | 920,448 bits | — |
| Embedded Memory Blocks | TriMatrix (M512/M4K/M-RAM) | — |
| Embedded DSP Blocks | 48 | — |
| Maximum User I/O | 335 | — |
| PLLs | 12 | — |
| Encapsulado | 484-ball FineLine BGA (FBGA-484), 23 x 23 mm, 1 mm pitch | 484-FBGA (23 × 23 mm, 1.0 mm pitch) |
| Speed Grade | C7 (-7) | C6 |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Configuration Methods | JTAG, Passive Serial, Passive Parallel | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | — |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Logic Elements / Cells | — | 10,570 |
| Number of LABs / CLBs | — | 1,057 |
| Total RAM Bits | — | 920,448 |
| Number of User I/O | — | 335 |
| Supply Voltage - Operating | — | 1.425 V to 1.575 V (core 1.5 V) |
| Temperatura de funcionamiento | — | 0 °C to 85 °C (TJ) |
| Tipo de montaje | — | Surface Mount (SMT) |
| Lead Free | — | Yes |
| Configuration Method | — | SRAM - volatile (JTAG / passive serial / passive parallel / fast passive parallel) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS |
| On-chip Resources | — | TriMatrix memory (M512, M4K, M-RAM), DSP blocks, PLLs |