EP1S10F484C7N vs EP1S10F484C6N 比較
詳細な並列比較: EP1S10F484C7N メーカー: Intel および EP1S10F484C6N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S10F484C7N | EP1S10F484C6N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $162.00 | $226.31 |
| Family | Stratix (EP1S) | Stratix |
| Manufacturer | Intel (formerly Altera) | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Logic Elements | 10,570 | — |
| Logic Array Blocks (LABs) | 1,057 | — |
| Embedded Memory (Total) | 920,448 bits | — |
| Embedded Memory Blocks | TriMatrix (M512/M4K/M-RAM) | — |
| Embedded DSP Blocks | 48 | — |
| Maximum User I/O | 335 | — |
| PLLs | 12 | — |
| パッケージ | 484-ball FineLine BGA (FBGA-484), 23 x 23 mm, 1 mm pitch | 484-FBGA (23 × 23 mm, 1.0 mm pitch) |
| Speed Grade | C7 (-7) | C6 |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Configuration Methods | JTAG, Passive Serial, Passive Parallel | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Logic Elements / Cells | — | 10,570 |
| Number of LABs / CLBs | — | 1,057 |
| Total RAM Bits | — | 920,448 |
| Number of User I/O | — | 335 |
| Supply Voltage - Operating | — | 1.425 V to 1.575 V (core 1.5 V) |
| 動作温度 | — | 0 °C to 85 °C (TJ) |
| 実装タイプ | — | Surface Mount (SMT) |
| Lead Free | — | Yes |
| Configuration Method | — | SRAM - volatile (JTAG / passive serial / passive parallel / fast passive parallel) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS |
| On-chip Resources | — | TriMatrix memory (M512, M4K, M-RAM), DSP blocks, PLLs |