EP1S10F672C7 vs EP1S10F672C7N Comparación
Comparación detallada lado a lado de EP1S10F672C7 por Altera y EP1S10F672C7N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S10F672C7 | EP1S10F672C7N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $158,00 | $171,00 |
| Family | Stratix | — |
| Logic Elements | 10,570 | — |
| Embedded Memory | 920,448 bits | — |
| User I/Os | 345 | — |
| Encapsulado | 672-pin FBGA (FineLine BGA) | — |
| Package Dimensions | 35 x 35 mm, 1.27 mm pitch | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage (VCCINT) | 1.5 V | — |
| Logic Cells | 10,570 | — |
| LABs (Logic Array Blocks) | 1,057 | — |
| Temperatura de funcionamiento | 0 C to 85 C (Commercial) | 0C to +85C (Commercial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| I/O Standards | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| Configuration Mode | JTAG, Passive Serial, Active Serial | — |
| Estado RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Series | — | Stratix |
| Logic Elements / Cells | — | 10,570 |
| Number of LABs/CLBs | — | 1,057 |
| Total RAM Bits | — | 920,448 |
| Number of User I/Os | — | 345 |
| Number of Gates | — | [DATA_NEEDED: total gate count] |
| DSP Blocks | — | 6 |
| Package Type | — | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch |
| Core Voltage | — | 1.5 V |
| Maximum Operating Frequency | — | 420.17 MHz |
| Configuration Method | — | SRAM, JTAG, passive/active serial/parallel |
| Nivel MSL | — | [DATA_NEEDED: MSL moisture sensitivity level] |