EP1S60F1020 vs EP1S60F1020C6N Comparación
Comparación detallada lado a lado de EP1S60F1020 por Altera y EP1S60F1020C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S60F1020 | EP1S60F1020C6N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3.995,00 | $195,00 |
| Series | Stratix | Stratix |
| Family | Altera Stratix (EP1S) | Stratix (EP1S) |
| Process Technology | 0.13 um CMOS | — |
| Logic Elements (LEs) | 57,120 | 57,120 |
| Logic Array Blocks (LABs) | 5,712 | — |
| Total RAM Bits | 5,215,104 | — |
| Embedded Multipliers (DSP Blocks) | [DATA_NEEDED: DSP block count] | — |
| User I/Os | 773 | — |
| PLLs | [DATA_NEEDED: PLL count, nominally 12 for Stratix EP1S60] | — |
| Encapsulado | 1020-BGA (FineLine FBGA) | — |
| Core Voltage | 1.5 V | — |
| Operating Temperature (base part) | Commercial (0C to +85C) | — |
| Speed Grade (base part) | [DATA_NEEDED: trailing suffix needed for explicit grade] | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Nivel MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Estado RoHS | [DATA_NEEDED: verify per part suffix] | Compliant (per 'N' suffix) |
| I/O Standard Support | LVDS, LVPECL, SSTL, HSTL, PCI/PCI-X | — |
| Configuration Memory | SRAM-based, requires external configuration device | — |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Embedded Multipliers | — | 773 (18x18) |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Temperatura de funcionamiento | — | 0°C to +85°C (Commercial) |
| Tensión de alimentación | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Speed Grade | — | C6 (mid-tier) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |