EP20K1000CF672C8ES vs EP20K1500CF33C8ES Comparación
Comparación detallada lado a lado de EP20K1000CF672C8ES por Intel y EP20K1500CF33C8ES por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K1000CF672C8ES - 1M-gate APEX20KE FPGA, 672-BGA | Intel
EP20K1000CF672C8ES ⚠ Última compra
Comparación de especificaciones
| Parámetro | EP20K1000CF672C8ES | EP20K1500CF33C8ES |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $285,00 | $288,00 |
| Family | APEX 20K (APEX20KE) | — |
| Logic Elements | 38,400 | 51,840 |
| Typical Gates | 25,920 | — |
| Maximum System Gates | 1,000,000 | — |
| Embedded Memory (ESB) | 216 Kbits | — |
| User I/O Pins | 508 | — |
| Encapsulado | 672-ball FineLine BGA | 1020-FBGA (FCBGA), 33x33 mm |
| Speed Grade | C8 | -1 (C8) |
| Temperatura de funcionamiento | Commercial (0C to +85C) | [DATA_NEEDED: operating temperature range] |
| Process Technology | 0.18 µm CMOS | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS, LVPECL, GTL, SSTL-2/3 | — |
| PLLs | 4 (ClockLock/ClockBoost) | — |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | ByteBlaster / MasterBlaster / Altera USB-Blaster |
| Nivel MSL | 3 (168 hours) | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS compliance for ES variant] |
| Series | — | APEX 20K (APEX 20KE family) |
| Manufacturer | — | Intel (formerly Altera) |
| System Gates | — | 1,500,000 |
| Maximum Gates (Equivalent) | — | 2,392,000 |
| Embedded System Block (ESB) Bits | — | 442,368 |
| CAM Bits | — | 216 Kbit |
| Number of PLLs | — | 4 |
| Number of Clocks | — | 8 clock pins |
| Maximum User I/O | — | 808 (1020-FBGA) |
| Voltage - Supply (Core) | — | 1.8 V nominal (multiVolt I/O supports 1.8/2.5/3.3/5.0 V) |
| I/O Standard Support | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS (multiVolt) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Sample Tier | — | ES (engineering sample) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |