EP20K1000CF672C8N vs EP20K1000CF672I8 Comparación
Comparación detallada lado a lado de EP20K1000CF672C8N por Intel y EP20K1000CF672I8 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K1000CF672C8N | EP20K1000CF672I8 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $178,40 | $165,00 |
| Device Family | APEX 20KC | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements / Cells | 38,400 | 38,400 |
| Equivalent Gate Count | 1,000,000 gates | — |
| Embedded Memory (bits) | 327,680 | — |
| Number of I/Os | 488 to 508 | — |
| Number of Pins / Balls | 672 | — |
| Encapsulado | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA), 45 x 45 mm, 1.27 mm pitch | 672-pin FC-FBGA (FineLine BGA) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Temperatura de funcionamiento | 0°C to 85°C (Commercial) | -40 °C to +85 °C (industrial, I suffix) |
| Supply Voltage (Vccint) | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper | 0.15 µm CMOS |
| Internal Operating Frequency (max) | 301.21 MHz | — |
| Propagation Delay (typ.) | 1.6 ns to 1.79 ns | — |
| Architecture | MultiCore (LUT + embedded memory + product-term) | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free finish status] | — |
| Pin-to-Pin Compatibility | APEX 20KE family (same 672-ball BGA) | — |
| Family | — | APEX 20KC |
| Manufacturer | — | Intel (formerly Altera) |
| System Gates | — | 1,000,000 |
| Ball Pitch | — | 1.00 mm |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| User I/O Count | — | 508 |
| Dedicated Inputs | — | 4 |
| Internal Frequency (max) | — | 301.21 MHz |
| Pin-to-Pin Logic Delay | — | 8 ns |
| Tipo de memoria | — | SRAM-based (volatile) |
| Embedded Memory | — | Embedded Array Blocks (EABs) for dual-port RAM / FIFO |
| PLL Count | — | 4 |
| I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL, HSTL |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |