EP20K100EBC356-3N vs EP20K100CB356C7 Comparación
Comparación detallada lado a lado de EP20K100EBC356-3N por Altera y EP20K100CB356C7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel
EP20K100CB356C7 ⚠ Última compraComparación de especificaciones
| Parámetro | EP20K100EBC356-3N | EP20K100CB356C7 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $92,00 | $71,00 |
| Series | APEX-20KE | APEX20K |
| Family | APEX 20K | — |
| Logic Elements / Cells | 4160 | — |
| System Gates | 100,000 | — |
| Embedded Memory (bits) | 53,248 | — |
| Embedded System Blocks (ESBs) | 26 | — |
| Maximum User I/Os | 246 | — |
| Número de pines | 356 | — |
| Encapsulado | 356-LBGA (Ball Grid Array) | 356-LBGA |
| Package Dimensions | 45 x 45 mm | — |
| Ball Pitch | 1.27 mm | — |
| Process Technology | 0.22 µm CMOS | 0.18 μm CMOS |
| Core Supply Voltage | 1.8 V | — |
| Propagation Delay | 1.6 ns (speed grade -3N) | — |
| Maximum Internal Frequency | 250 MHz | — |
| Temperatura de funcionamiento | 0 °C to +85 °C | Commercial grade |
| Tipo de montaje | Surface Mount | — |
| Programmable Interface | JTAG (IEEE 1149.1) | — |
| I/O Standards Supported | LVCMOS, LVTTL, PCI, SSTL-2/3, GTL+ | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) |
| Estado RoHS | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Intel (formerly Altera) |
| Typical Gates | — | 100,000 |
| Maximum Logic Elements | — | 53,248 |
| User I/O Pins | — | 252 |
| Embedded Memory (Bits) | — | 53,248 |
| Number of PLLs | — | 4 |
| Core Voltage | — | 2.5 V |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Speed Grade | — | C7 |