EP20K100FC144-1 vs EP20K100EFC144-1 Comparación
Comparación detallada lado a lado de EP20K100FC144-1 por Altera y EP20K100EFC144-1 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K100FC144-1 | EP20K100EFC144-1 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $78,50 | $61,75 |
| Series | APEX-20K | — |
| Family | APEX-20K | — |
| Typical Gates | 100,000 | 100,000 |
| Logic Elements | 4,160 | 4,160 |
| Embedded RAM Bits | 53,248 | — |
| User I/O Pins | 93 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Number of Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Number of Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Core Voltage | 2.5 V | — |
| I/O Voltage | 3.3 V (PCI-compatible) | — |
| Speed Grade | -1 (slowest) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: temperature grade] | 0 °C to 85 °C (commercial) |
| Encapsulado | 144-LQFP | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programmable Interface | JTAG / IEEE 1532 (ISP) | — |
| PCI Compliance | 3.3V PCI compliant | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | APEX 20KE |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Maximum System Gates | — | 263,000 |
| Embedded System Blocks (ESBs) | — | Yes (memory + dedicated logic) |
| User I/Os | — | 93 |
| Propagation Delay | — | 1.6 ns |
| PLLs | — | 4 |
| Package Type | — | 144-ball FBGA (13x13 mm, 1.0 mm pitch) |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) |
| Process Technology | — | 0.15-µm all-layer copper |
| Configuration Method | — | SRAM (volatile) - external boot PROM required |
| Boundary-Scan Support | — | IEEE 1149.1 (JTAG) |