EP20K100QC240-3 vs EP20K100QC240-1XV Comparación
Comparación detallada lado a lado de EP20K100QC240-3 por Altera y EP20K100QC240-1XV por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K100QC240-1XV - APEX 20K 100K-Gate FPGA, 240-PQFP | Intel / Altera
EP20K100QC240-1XV ObsoleteComparación de especificaciones
| Parámetro | EP20K100QC240-3 | EP20K100QC240-1XV |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $24,50 | $52,10 |
| Manufacturer | Altera | — |
| FPGA Family | APEX-20K | — |
| Number of Logic Elements | 4160 cells | — |
| Total RAM Bits | 53248 bits | — |
| Number of User I/O | 189 | — |
| Typical Gate Count | 263000 gates | — |
| Core Supply Voltage | 2.5 V | — |
| Frecuencia de reloj máxima | 167 MHz (family rating) | — |
| Speed Grade | -3 | — |
| Technology Process | 0.22 um | — |
| Package Type | 240-BFQFP | — |
| Número de pines | 240 | — |
| Tipo de montaje | Surface Mount | Surface Mount (gull-wing leads) |
| Rango de temperatura de funcionamiento | 0 °C to +85 °C (commercial) | — |
| Propagation Delay | [DATA_NEEDED: propagation delay timing table] | — |
| Supported I/O Standards | [DATA_NEEDED: supported I/O standards] | — |
| Configuration / JTAG Interface | [DATA_NEEDED: configuration and JTAG interface details] | — |
| RoHS Compliance | [DATA_NEEDED: RoHS compliance for non-N version] | — |
| Series | — | APEX 20K |
| Device Family | — | APEX 20K (MultiCore architecture) |
| System Gates | — | 100,000 gates |
| Logic Elements (Cells) | — | 4,160 |
| Embedded Memory | — | 53,248 bits |
| User I/Os | — | 189 |
| Dedicated Inputs | — | 4 |
| PLLs | — | 4 |
| Core Supply Voltage (VCCINT) | — | 2.5 V nominal (2.375 V to 2.625 V) |
| I/O Supply Voltage (VCCIO) | — | 3.3 V / 5 V tolerant |
| Propagation Delay (tpd) | — | 2.5 ns |
| Maximum Internal Frequency | — | 250 MHz |
| Process Technology | — | 0.22 um CMOS |
| Encapsulado | — | 240-pin PQFP (32 x 32 mm, 0.5 mm pitch) |
| Temperatura de funcionamiento | — | 0C to +85C (commercial) / -40C to +85C (industrial variant) |
| Configuration Interface | — | JTAG / serial (EPC configuration device) |
| Estado RoHS | — | Non-compliant (legacy PQFP, non-LEAD-FREE process) |
| Estado del ciclo de vida | — | Obsolete / last-time-buy per Altera PCN |