EP20K200CB356C7N vs EP20K200CB356C8N Comparación
Comparación detallada lado a lado de EP20K200CB356C7N por Intel y EP20K200CB356C8N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N ObsoleteComparación de especificaciones
| Parámetro | EP20K200CB356C7N | EP20K200CB356C8N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $92,00 | $56,40 |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K200 | EP20K200 |
| System Gates | 200,000 | 200,000 |
| Logic Elements / Cells | 8,320 | — |
| Maximum Operating Frequency | 3571.6 MHz (internal equivalent) | — |
| Propagation Delay | 1.48 ns | — |
| User I/Os | 263 | — |
| Input Terminals | 267 | — |
| Supply Voltage (Nominal) | 1.8 V | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Temperatura de funcionamiento | 0C to +85C (Commercial) | — |
| Encapsulado | 356-ball PBGA (S-PBGA) | 356-ball LBGA |
| Tipo de montaje | Surface Mount | — |
| Embedded Memory | ESBs (dual-port RAM/ROM/FIFO) | — |
| Clock Management | PLL with up to 4 outputs | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| In-System Programmable | Yes | — |
| Estado RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | SRAM-based LUT FPGA |
| Logic Elements (Cells) | — | 8,320 |
| Maximum Internal Frequency | — | 301.21 MHz |
| Propagation Delay (tpd) | — | 1.78 ns |
| Nominal Core Supply Voltage | — | 1.8 V |
| Core Supply Voltage Range | — | 1.71 V to 1.89 V |
| Number of User I/O Pins | — | 263 |
| Number of Dedicated Inputs | — | 4 |
| Total Macrocells / Output Functions | — | 263 |
| Embedded Memory Bits | — | 106,496 bits |
| Number of PLLs | — | 4 |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Differential Signaling | — | LVDS |
| Configuration Interface | — | Serial / JTAG (IEEE 1149.1) |
| Operating Temperature (commercial "C") | — | 0 C to +85 C (TJ) |
| Terminal Finish ("N") | — | Lead-free / Pb-free |
| Nivel de sensibilidad a la humedad (MSL) | — | [DATA_NEEDED: MSL rating] |