EP20K200CF484C8N vs EP20K200CF484C9N Comparación
Comparación detallada lado a lado de EP20K200CF484C8N por Intel y EP20K200CF484C9N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K200CF484C8N | EP20K200CF484C9N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $102,95 | $201,04 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements (LEs) | 8,320 | — |
| System Gates | 200,000 | — |
| Embedded System Memory (Bits) | 106,496 | — |
| Maximum Operating Frequency | 301.21 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V | 1.8 V |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt) | 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) |
| Encapsulado | 484-ball FBGA (FineLine BGA) | 484-pin FineLine BGA (FBGA) |
| Speed Grade | -8 | C9 (250 MHz) |
| Operating Temperature (Commercial) | 0 °C to +85 °C | — |
| Lead-Free / Pb-Free | Yes (suffix 'N') | — |
| Number of I/O Pins | [DATA_NEEDED: max user I/O count for FBGA-484 package] | — |
| Configuration Method | JTAG / Serial / Passive Parallel | — |
| Embedded Memory Type | True dual-port / single-port RAM (ESB) | — |
| PLL Count | [DATA_NEEDED: PLL count for EP20K200 family] | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Estado RoHS | Compliant (Pb-free suffix) | Compliant |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Typical Gates | — | 200,000 |
| Logic Elements | — | 8,320 |
| Embedded System Block (ESB) Bits | — | 106,496 |
| Maximum User I/O | — | 376 |
| Frecuencia de reloj máxima | — | 250 MHz |
| Temperature Grade | — | Industrial (0C to +85C) |
| Configuration Scheme | — | SRAM-based, supports passive serial/parallel and JTAG |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |