EP20K300EQC240-2XN vs EP20K300EQC240-3 Comparación
Comparación detallada lado a lado de EP20K300EQC240-2XN por Intel y EP20K300EQC240-3 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K300EQC240-2XN | EP20K300EQC240-3 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $12,40 | $87,20 |
| Series | APEX-20KE | — |
| Number of Logic Elements / Cells | 11520 | — |
| Number of LABs/CLBs | 1152 | — |
| Number of Macrocells | [DATA_NEEDED: macrocells] | — |
| Maximum User I/O Pins | 152 | — |
| Total RAM Bits | 147456 | — |
| System Gates (datasheet) | 728000 | — |
| Family Gates (ordering code) | 300000 | — |
| Maximum Internal Clock | 350 MHz | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| Supply Voltage Range | 1.71 V to 1.89 V | — |
| Speed Grade | -2 | -3 |
| Rango de temperatura de funcionamiento | 0 to +85 °C (TJ) | — |
| Process Technology | 0.22 um CMOS | 0.22 um CMOS |
| Encapsulado / Carcasa | 240-PQFP / 240-BQFP (32x32 mm) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado del ciclo de vida | Obsolete (EOL) | — |
| Lead-Free | Yes (N suffix) | — |
| RoHS | unknown | — |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| ECCN | [DATA_NEEDED: ECCN] | — |
| Family | — | APEX-20KE |
| Typical Gates | — | 300,000 |
| Logic Elements / Cells | — | 11,520 |
| Embedded Memory (bits) | — | 147,456 |
| Maximum User I/O | — | 152 |
| Number of PLLs | — | 4 |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage Tolerance | — | 2.5V / 3.3V / 5.0V compatible |
| Encapsulado | — | 240-pin PQFP / BFQFP (240-BFQFP) |
| Pin Pitch | — | 1.0 mm |
| Terminal Form | — | Gull Wing |
| Temperatura de funcionamiento | — | 0C to +85C (commercial) |
| Programmable Logic Type | — | Loadable PLD |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial |
| Estado RoHS | — | [DATA_NEEDED: confirm for this date code] |