EP20K400CB652I9 vs EP20K400CB652I7 Comparación
Comparación detallada lado a lado de EP20K400CB652I9 por Altera y EP20K400CB652I7 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400CB652I9 | EP20K400CB652I7 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $99,50 | $149,50 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 16,640 cells | — |
| System Gates | 400,000 | — |
| Maximum User I/O | 488 | — |
| Embedded Memory Bits | 212,992 bits | — |
| Embedded System Blocks (ESBs) | 104 | — |
| Process Technology | 0.15 um CMOS | 0.15 µm CMOS |
| Core Voltage | 1.8 V | — |
| Maximum Frequency | 250 MHz | — |
| Encapsulado | 652-pin LBGA (CB) | BGA-652 (652-ball) |
| Maximum Seated Height | 1.63 mm | — |
| Temperatura de funcionamiento | -40C to +85C (industrial, 'I' grade) | — |
| Speed Grade | -9 | 7 |
| Total Terminals | 652 | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance verification] | Non-compliant (JESD-609 e0, contains lead) |
| Device Family | — | Field-Programmable Gate Array (FPGA) |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| Maximum Operating Frequency | — | 375.94 MHz |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltage | — | 1.8 V / 3.3 V |
| Package Code (JESD-30) | — | S-PBGA-B652 |
| Terminal Form | — | Ball |
| Package Shape | — | Square |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Embedded Memory | — | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM |
| Configuration Method | — | SRAM + JTAG (ISP) |
| Temperature Grade | — | Industrial (-40 °C to +100 °C) |
| Manufacturer Status | — | Obsolete (Intel/Altera legacy FPGA) |