EP20K400CB652I9 vs EP20K400CB652I7 Comparaison
Comparaison détaillée côte à côte de EP20K400CB652I9 par Altera et EP20K400CB652I7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400CB652I9 | EP20K400CB652I7 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $99,50 | $149,50 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 16,640 cells | — |
| System Gates | 400,000 | — |
| Maximum User I/O | 488 | — |
| Embedded Memory Bits | 212,992 bits | — |
| Embedded System Blocks (ESBs) | 104 | — |
| Process Technology | 0.15 um CMOS | 0.15 µm CMOS |
| Core Voltage | 1.8 V | — |
| Maximum Frequency | 250 MHz | — |
| Boîtier | 652-pin LBGA (CB) | BGA-652 (652-ball) |
| Maximum Seated Height | 1.63 mm | — |
| Température de fonctionnement | -40C to +85C (industrial, 'I' grade) | — |
| Speed Grade | -9 | 7 |
| Total Terminals | 652 | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance verification] | Non-compliant (JESD-609 e0, contains lead) |
| Device Family | — | Field-Programmable Gate Array (FPGA) |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| Maximum Operating Frequency | — | 375.94 MHz |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltage | — | 1.8 V / 3.3 V |
| Package Code (JESD-30) | — | S-PBGA-B652 |
| Terminal Form | — | Ball |
| Package Shape | — | Square |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Embedded Memory | — | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM |
| Configuration Method | — | SRAM + JTAG (ISP) |
| Temperature Grade | — | Industrial (-40 °C to +100 °C) |
| Manufacturer Status | — | Obsolete (Intel/Altera legacy FPGA) |